LH1594 SHARP [Sharp Electrionic Components], LH1594 Datasheet - Page 26

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LH1594

Manufacturer Part Number
LH1594
Description
80-Segment and 17-Common Outputs LCD Driver IC with A Built-in CGROM
Manufacturer
SHARP [Sharp Electrionic Components]
Datasheet
4.17. Annunciator Control Register Set
4.18. Busy Flag/Address Read
"BF = 1" indicates that the LH1594/LH1595 are
internally operating and the next instruction is not
accepted until "BF = 0".
The busy flag is only generated when the display is
cleared or the ACL command is executed.
Therefore, any other instruction can be executed
without monitoring the busy flag.
I0 to I9 : These
* mark means "Don't care".
* mark means "Don't care".
COMS
SEGS
SEGS
RE
RE
0/1
0
1
annunciator. Io to I9 correspond to
SEGS
outputs.
0
1
RS
RS
0
0
0
Display OFF ("DA" = "0")
to SEGS
bits
Example of Outputs for Annunciator (DA = "1", I0 = "0", I1 = "1")
BF
D
D
1
7
7
are
"V
"V
"V
SS
SS
SS
9
"
"
"
for static LCD drive
D
D
*
1
setting
6
6
DA
D
D
I5
A
5
5
data
D
D
I4
*
A
1 Frame
4
4
"V
"V
"V
for
SS
SS
DD
Display ON ("DA" = "1")
"
"
"
D
D
26
I3
I9
A
3
3
Simultaneously,
presented in binary number for "AAAAAA" is read
out. The address counter is used by the DDRAM,
CGRAM, and SEGRAM. The data read out from
the RAMs is determined by specifying a command
before reading out.
DA
D
D
I2
I8
A
2
2
: When DA = "1", output pin for static
D
D
I1
I7
A
LCD drive (for annunciator display). One
level is selected from V
levels depending on the combination of
COMS signal and display data (I0 to I9).
When DA = "0", outputs V
1
1
1 Frame
"V
"V
"V
DD
DD
SS
"
"
"
D
D
I0
I6
A
0
0
the
address
LH1594/LH1595
Not lighted
Lighted
counter
SS
DD
level.
and V
value
SS

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