MX25L3225DM2I-10G MCNIX [Macronix International], MX25L3225DM2I-10G Datasheet - Page 5

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MX25L3225DM2I-10G

Manufacturer Part Number
MX25L3225DM2I-10G
Description
32M-BIT [x 1/x 2/x 4] CMOS SERIAL FLASH
Manufacturer
MCNIX [Macronix International]
Datasheet
P/N: PM1432
GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 32M:33,554,432 x 1 bit structure or 16,772,216 x 2 bits (two I/O read mode) structure or 8,388,608 x 4 bits (four I/O
• 1024 Equal Sectors with 4K byte each (32Mb)
• 64 Equal Blocks with 64K byte each (32Mb)
• Power Supply Operation
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is from 1.5V to 2.5V
PERFORMANCE
• High Performance
• Low Power Consumption
• Typical 100,000 erase/program cycles
• 10 years data retention
SOFTWARE FEATURES
• Input Data Format
• Advanced Security Features
• Auto Erase and Auto Program Algorithm
FEATURES
read mode) structure
- Any Sector can be erased individually
- Any Block can be erased individually
- 2.7 to 3.6 volt for read, erase, and program operations
- Fast read
- Fast access time: 104MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load)
- Serial clock of four I/O read mode : 75MHz (15pF + TTL Load), which is equivalent to 300MHz
- Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)
- Byte program time: 7us (typical)
- Continuously program mode (automatically increase address under word program mode)
- Fast erase time: 90ms (typ.)/sector (4K-byte per sector) ; 0.7s(typ.) /block (64K-byte per block); 25s(typ.) /chip
- Low active read current: 25mA(max.) at 104MHz, 20mA(max.) at 66MHz and 10mA(max.) at 33MHz
- Low active programming current: 20mA (max.)
- Low active erase current: 20mA (max.)
- Low standby current: 20uA (max.)
- 1-byte Command code
- Block lock protection
- Additional 4K bit secured OTP for unique identifier
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program pulse widths (Any page to be programed should have page in the erased state first)
The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions
Automatically erases and verifies data at selected sector
Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
- 1 I/O: 104MHz with 8 dummy cycles
- 4 I/O: 75MHz with 6 dummy cycles
- 2 I/O: 75MHz with 4 dummy cycles
32M-BIT [x 1/x 2/x 4] CMOS SERIAL FLASH
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ADVANCED INFORMATION
MX25L3225D
REV. 0.00, SEP. 19, 2008

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