AS4LC4M16DG-5S/IT AUSTIN [Austin Semiconductor], AS4LC4M16DG-5S/IT Datasheet

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AS4LC4M16DG-5S/IT

Manufacturer Part Number
AS4LC4M16DG-5S/IT
Description
4 MEG x 16 DRAM
Manufacturer
AUSTIN [Austin Semiconductor]
Datasheet
4 MEG x 16 DRAM
Extended Data Out (EDO) DRAM
FEATURES
• Single +3.3V ±0.3V power supply.
• Industry-standard x16 pinout, timing, functions, and
package.
• 12 row, 10 column addresses
• High-performance CMOS silicon-gate process
• All inputs, outputs and clocks are LVTTL-compatible
• Extended Data-Out (EDO) PAGE MODE access
• 4,096-cycle CAS\-BEFORE-RAS\ (CBR) REFRESH
distributed across 64ms
• Optional self refresh (S) for low-power data retention
• Level 1 Moisture Sensitivity Rating, JEDEC J-STD-020
OPTIONS
• Package(s)
• Timing
• Refresh Rates
• Operating Temperature Ranges
NOTE: The \ symbol indicates signal is active LOW.
*Contact factory for availability. Self refresh option available on IT
version only.
KEY TIMING PARAMETERS
AS4LC4M16
Rev. 1.0 7/02
SPEED
-5
-6
50ns access
60ns access
50-pin TSOP (400-mil)
Standard Refresh
Self Refresh
Military (-55°C to +125°C)
Industrial (-40°C to +85°C)
104ns 60ns
84ns
t
RC
50ns
t
RAC
Austin Semiconductor, Inc.
20ns
25ns
t
PC
25ns
30ns
MARKINGS
t
AA
XT
None
IT
-5
-6
S*
DG
13ns
15ns
t
CAC
10ns
t
8ns
CAS
1
Configuration
Refresh
Row Address
Column Addressing
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
For more products and information
www.austinsemiconductor.com
please visit our web site at
PIN ASSIGNMENT
50-Pin TSOP (DG)
(Top View)
AS4LC4M16
4 Meg x 16
A0-A11
A0-A9
4K
DRAM
DRAM
DRAM
DRAM
DRAM

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AS4LC4M16DG-5S/IT Summary of contents

Page 1

Austin Semiconductor, Inc. 4 MEG x 16 DRAM Extended Data Out (EDO) DRAM FEATURES • Single +3.3V ±0.3V power supply. • Industry-standard x16 pinout, timing, functions, and package. • 12 row, 10 column addresses • High-performance CMOS silicon-gate process • ...

Page 2

Austin Semiconductor, Inc. FUNCTIONAL BLOCK DIAGRAM AS4LC4M16 Rev. 1.0 7/02 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 DRAM DRAM DRAM DRAM DRAM AS4LC4M16 ...

Page 3

Austin Semiconductor, Inc. GENERAL DESCRIPTION The 4 Meg x 16 DRAM is a high-speed CMOS, dynamic random-access memory device containing 67,108,864 bits and designed to operate from 3V to 3.6V. The device is functionally organized as 4,194,304 locations containing 16 ...

Page 4

Austin Semiconductor, Inc. DRAM ACCESS (continued) A logic HIGH on WE\ dictates read mode, while a logic LOW on WE\ dictates write mode. During a WRITE cycle, data-in (D) is latched by the falling edge CAS\ (CASL\ ...

Page 5

Austin Semiconductor, Inc. FIGURE 3: OE\ Control of DQs FIGURE 4: WE\ Control of DQs AS4LC4M16 Rev. 1.0 7/02 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 DRAM DRAM DRAM DRAM DRAM AS4LC4M16 ...

Page 6

Austin Semiconductor, Inc. EDO PAGE MODE (Continued) two methods to disable the outputs and keep them disabled during the CAS\ HIGH time. The first method is to have OE\ HIGH when CAS\ transitions HIGH and keep OE\ HIGH for tOEHC ...

Page 7

Austin Semiconductor, Inc. ABSOLUTE MAXIMUM RATINGS* Voltage on V Relative to V .......................................-1V to +4. Voltage on NC, Inputs or I/O Pins Relative to V ...................................................-1V to +4.6V SS Power Dissipation...........................................................................1W Operating temperature range, T (ambient)..............-55°C to 125°C ...

Page 8

Austin Semiconductor, Inc. I OPERATING CONDITIONS AND MAXIMUM LIMITS +3.3V ±0.3V) CC PARAMETERS STANDBY CURRENT: TTL RAS\ = CAS STANDBY CURRENT: CMOS (RAS\ = CAS\ > 0.2V; DQs may be left open; ...

Page 9

Austin Semiconductor, Inc. 2 CAPACITANCE PARAMETER Input Capacitance: Address Pins Input Capacitance: RAS\, CAS\, WE\, OE\ Input/Output Capacitance ELECTRICAL CHARACTERISTICS (V = +3.3V ±0.3V) CC DESCRIPTION Access time from column address Column-address setup to CAS\ precharge Column-address hold ...

Page 10

Austin Semiconductor, Inc. AC ELECTRICAL CHARACTERISTICS (Continued +3.3V ±0.3V) CC DESCRIPTION EDO-PAGE-MODE READ or WRITE cycle time EDO-PAGE-MODE READ-WRITE cycle time Access time from RAS\ RAS\ to column-address delay time Row address hold time RAS\ pulse width RAS\ ...

Page 11

Austin Semiconductor, Inc. NOTES: 1. All voltages referenced This parameter is sampled +3.3V MHz dependent on output loading and cycle rates. CC Specified values are ...

Page 12

Austin Semiconductor, Inc. NOTES (Continued): 35. V overshoot: V (MAX 3ns, and the pulse width cannot be greater than one third of the cycle rate. V undershoot: V (MIN) = -2V for a pulse width ...

Page 13

Austin Semiconductor, Inc. NOTES referenced from rising edge of RAS\ or CAS\, whichever occurs last. OFF AS4LC4M16 Rev. 1.0 7/02 READ CYCLE Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 13 DRAM ...

Page 14

Austin Semiconductor, Inc. AS4LC4M16 Rev. 1.0 7/02 EARLY WRITE CYCLE Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 14 DRAM DRAM DRAM DRAM DRAM AS4LC4M16 ...

Page 15

Austin Semiconductor, Inc. (LATE WRITE and READ-MODIFY-WRITE cycles) AS4LC4M16 Rev. 1.0 7/02 READ-WRITE CYCLE Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 15 DRAM DRAM DRAM DRAM DRAM AS4LC4M16 ...

Page 16

Austin Semiconductor, Inc. EDO-PAGE-MODE READ CYCLE NOTES (MAX) = 80,000ns for XT temperature version. RASP AS4LC4M16 Rev. 1.0 7/02 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 16 DRAM DRAM DRAM DRAM DRAM ...

Page 17

Austin Semiconductor, Inc. EDO-PAGE-MODE EARLY WRITE CYCLE NOTES (MAX) = 80,000ns for XT temperature version. RASP AS4LC4M16 Rev. 1.0 7/02 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 17 DRAM DRAM DRAM DRAM ...

Page 18

Austin Semiconductor, Inc. EDO-PAGE-MODE READ-WRITE CYCLE (LATE WRITE and READ-MODIFY-WRITE cycles) NOTES (MAX) = 80,000ns for XT temperature version. RASP AS4LC4M16 Rev. 1.0 7/02 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 18 ...

Page 19

Austin Semiconductor, Inc. EDO-PAGE-MODE READ EARLY WRITE CYCLE (Pseudo READ-MODIFY-WRITE) NOTES (MAX) = 80,000ns for XT temperature version. RASP AS4LC4M16 Rev. 1.0 7/02 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 19 DRAM ...

Page 20

Austin Semiconductor, Inc. AS4LC4M16 Rev. 1.0 7/02 READ CYCLE (with WE\-controlled disable) 20 DRAM DRAM DRAM DRAM DRAM AS4LC4M16 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ...

Page 21

Austin Semiconductor, Inc. (Addresses and OE\ = DON’T CARE) NOTES: 1. End of first CBR REFRESH cycle. AS4LC4M16 Rev. 1.0 7/02 RAS\-ONLY REFRESH CYCLE (OE\ and WE\ = DON’T CARE) CBR REFRESH CYCLE 21 DRAM DRAM DRAM DRAM DRAM AS4LC4M16 ...

Page 22

Austin Semiconductor, Inc. NOTES HIDDEN REFRESH may also be performed after a WRITE cycle. In this case, WE\ is LOW and OE\ is HIGH. AS4LC4M16 Rev. 1.0 7/02 HIDDEN REFRESH CYCLE (WE\ = HIGH; OE\ = LOW) 22 ...

Page 23

Austin Semiconductor, Inc. (Addresses and OE\ = DON’T CARE) NOTES: 1. Once t (MIN) is met and RAS\ remains LOW, the DRAM will enter self refresh mode. RASS 2. Once t is satisfied, a complete burst of all rows should ...

Page 24

Austin Semiconductor, Inc. MECHANICAL DEFINITIONS AS4LC4M16 Rev. 1.0 7/02 (Package Designator DG) Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 24 DRAM DRAM DRAM DRAM DRAM AS4LC4M16 ...

Page 25

... Austin Semiconductor, Inc. ORDERING INFORMATION EXAMPLE: AS4LC4M16DG-6S/XT Device Number AS4LC4M16 AS4LC4M16 *AVAILABLE PROCESSES XT = Industrial Temperature Range IT = Industrial Temperature Range OPTION DEFINITIONS S = Self Refresh AS4LC4M16 Rev. 1.0 7/02 Package Speed Options Type - +125 o - +85 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. ...

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