MSP3435G ETC [List of Unclassifed Manufacturers], MSP3435G Datasheet - Page 14

• Manufacturer Part Number: MSP3435G
• Description: MSP 34x5G Multistandard Sound Processor Family
• Manufacturer: ETC [List of Unclassifed Manufacturers]

MSP 34x5G
2.8. ADR Bus Interface
For the ASTRA Digital Radio System (ADR), the
MSP 3405G, MSP 3415G, and MSP 3455G performs
preprocessing such as carrier selection and filtering.
Via the 3-line ADR-bus, the resulting signals are trans-
ferred to the DRP 3510A coprocessor, where the
source decoding is performed. To be prepared for an
upgrade to ADR with an additional DRP board, the fol-
lowing lines of MSP 34x5G should be provided on a
feature connector:
– I2S_DA_IN1 or I2S_DA_IN2
– I2S_DA_OUT
– I2S_WS
– I2S_CL
– ADR_CL, ADR_WS, ADR_DA
For more details, please refer to the DRP 3510A data
sheet.
2.9. Digital Control I/O Pins and
The static level of the digital input/output pins
D_CTR_I/O_0/1 is switchable between HIGH and
LOW via the I
(see page 34). This enables the controlling of external
hardware switches or other devices via I
The digital input/output pins can be set to high imped-
ance by means of the MODUS register (see page 23).
In this mode, the pins can be used as input. The cur-
rent state can be read out of the STATUS register (see
page 25).
Optionally, the pin D_CTR_I/O_1 can be used as an
interrupt request signal to the controller, indicating any
changes in the read register STATUS. This makes poll-
ing unnecessary; I
minimum (see STATUS register on page 25 and
MODUS register on page 23).
14
Status Change Indication
2
C-bus by means of the ACB register
2
C-bus interactions are reduced to a
2
C-bus.
2.10. Clock PLL Oscillator and
The MSP 34x5G derives all internal system clocks
from the 18.432 MHz oscillator. In NICAM or in I
Slave mode, the clock is phase-locked to the corre-
sponding source. Therefore, it is not possible to use
NICAM and I
For proper performance, the MSP clock oscillator
requires a 18.432-MHz crystal. Note, that for the
phase-locked mode (NICAM, I
tighter tolerance are required.
Crystal Specifications
2
S-Slave mode at the same time.
PRELIMINARY DATA SHEET
2
S slave), crystals with
Micronas
2
S-