K9K8G08U1M Samsung, K9K8G08U1M Datasheet - Page 39

• Manufacturer Part Number: K9K8G08U1M
• Description: 512M x 8 Bits / 1G x 8 Bits NAND Flash Memory
• Manufacturer: Samsung

K9K8G08U1M
K9F4G08U0M
Read ID
The device contains a product identification mode, initiated by writing 90h to the command register, followed by an address input of
00h. Five read cycles sequentially output the manufacturer code(ECh), and the device code and 3rd, 4th cycle ID respectively. The
command register remains in Read ID mode until further commands are issued to it. Figure 18 shows the operation sequence.
Figure 18. Read ID Operation
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. If the device is already in reset state a new reset command will be
accepted by the command register. The R/B pin changes to low for tRST after the Reset command is written. Refer to Figure 19
below.
Figure 19. RESET Operation
R/B
I/O
CLE
CE
WE
ALE
RE
I/O
X
X
K9F4G08U0M
K9K8G08U1M
Device
90h
FFh
Address. 1cycle
Device Code*(2nd Cycle)
00h
t
CLR
DCh
t
WHR
t
AR
t
CEA
t
REA
t
Same as each K9F4G08U0M in it
RST
Maker code
39
ECh
3rd Cycle*
Device code
10h
Device
Code*
3rd Cyc.*
FLASH MEMORY
4th Cycle*
4th Cyc.*
95h
Advance