M12L16161A-5T ESMT [Elite Semiconductor Memory Technology Inc.], M12L16161A-5T Datasheet - Page 23

• Manufacturer Part Number: M12L16161A-5T
• Description: 512K x 16Bit x 2Banks Synchronous DRAM
• Manufacturer: ESMT [Elite Semiconductor Memory Technology Inc.]

Burst Read Single bit Write Cycle @Burst Length=2
*Note:1.BRSW modes is enabled by setting A9 “High” at MRS(Mode Register Set).
Elite Semiconductor Memory Technology Inc.
DQ
A 1 0 / A P
C L O C K
A D D R
D Q M
C K E
R A S
C A S
C L = 2
C L = 3
2.When BRSW write command with auto precharge is executed, keep it in mind that
W E
B A
C S
At the BRSW Mode, the burst length at write is fixed to “1” regardless of programmed burst length.
Auto precharge is executed at the next cycle of burst-end, so in the case of BRSW write command, the precharge
command will be issued after two clock cycles.
R o w A c t i v e
0
* N o t e 1
( A - B a n k )
R A a
R A a
1
2
( A - B a n k )
3
W r i t e
D A a 0
D A a 0
C A a
Row Active
4
(B-Bank)
R B b
R B b
5
Auto Precharge
C A b
Read with
(A-Bank)
6
7
Q A b 0
8
Q A b 0
Q A b 1
9
H I G H
Q A b 1
P.23
R o w A c t i v e
1 0
( A - B a n k )
R A c
R A c
1 1
A u t o P r e c h a r g e
1 2
W r i t e w i t h
( B - B a n k )
D B c 0
D B c 0
C B c
1 3
* N o t e 2
Publication Date : Jan. 2000
1 4
t
RAS
( A - B a n k )
R e a d
C A d
should not be violated.
1 5
M12L16161A
1 6
Q A d 0 Q A d 1
Revision : 1.3u
1 7
Q A d 0 Q A d 1
1 8
P r e c h a r g e
( A - B a n k )
: D o n ' t C a r e
1 9