SX1231-31SKB868-EVAL Semtech, SX1231-31SKB868-EVAL Datasheet - Page 26
SX1231-31SKB868-EVAL
Manufacturer Part Number
SX1231-31SKB868-EVAL
Description
development tool usb kit for sx1231 transceiver...
Manufacturer
Semtech
Datasheet
1.SX1231-31SKB433.pdf
(84 pages)
- Current page: 26 of 84
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3.5.5. Quadrature Mixer - ADCs - Decimators
The mixer is inserted between output of the RF buffer stage and the input of the analog to digital converter (ADC) of the
receiver section. This block is designed to translate the spectrum of the input RF signal to base-band, and offer both high
IIP2 and IIP3 responses.
In the lower bands of operation (290 to 510 MHz), the multi-phase mixing architecture with weighted phases improves the
rejection of the LO harmonics in receiver mode, hence increasing the receiver immunity to out-of-band interferers.
The I and Q digitalization is made by two 5
gain is not constant over temperature, but the whole receiver is calibrated before reception, so that this inaccuracy has no
impact on the RSSI precision. The ADC output is one bit per channel. It needs to be decimated and filtered afterwards. This
ADC can also be used for temperature measurement, please refer to section 3.5.17 for more details.
The decimators decrease the sample rate of the incoming signal in order to optimize the area and power consumption of
the following receiver blocks.
3.5.6. Channel Filter
The role of the channel filter is to filter out the noise and interferers outside of the channel. Channel filtering on the SX1231
is implemented with a 16-tap Finite Impulse Response (FIR) filter, providing an outstanding Adjacent Channel Rejection
performance, even for narrowband applications.
Note
The single-side channel filter bandwidth RxBw is controlled by the parameters RxBwMant and RxBwExp in RegRxBw:
The following channel filter bandwidths are accessible (oscillator is mandated at 32 MHz):
Table 13 Available RxBw Settings
Rev 4 - Nov 2010
ADVANCED COMMUNICATIONS & SENSING
When FSK modulation is enabled:
When OOK modulation is enabled:
to respect oversampling rules in the decimation chain of the receiver, the Bit Rate cannot be set at a higher value
than 2 times the single-side receiver bandwidth (BitRate < 2 x RxBw)
(binary/value)
RxBwMant
10b / 24
01b / 20
00b / 16
10b / 24
01b / 20
00b / 16
10b / 24
01b / 20
00b / 16
10b / 24
th
RxBwExp
order continuous-time Sigma-Delta Analog to Digital Converters (ADC). Their
(decimal)
RxBw
RxBw
7
7
7
6
6
6
5
5
5
4
=
=
----------------------------------------------------------------- -
RxBwMant
----------------------------------------------------------------- -
RxBwMant
ModulationType=00
Page 26
FXOSC
FXOSC
FSK
10.4
12.5
15.6
20.8
2.6
3.1
3.9
5.2
6.3
7.8
×
×
2
2
RxBwExp
RxBwExp
RxBw (kHz)
+
+
2
3
ModulationType=01
OOK
10.4
1.3
1.6
2.0
2.6
3.1
3.9
5.2
6.3
7.8
DATASHEET
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SX1231
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