AT89S8253-24JU SL383 Atmel, AT89S8253-24JU SL383 Datasheet - Page 6
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AT89S8253-24JU SL383
Manufacturer Part Number
AT89S8253-24JU SL383
Description
Manufacturer
Atmel
Datasheet
1.AT89S8253-24JU_SL383.pdf
(60 pages)
- Current page: 6 of 60
- Download datasheet (2Mb)
3.13
3.14
3.15
4. Block Diagram
6
EA/VPP
XTAL1
XTAL2
AT89S8253
External Access Enable. EA must be strapped to GND in order to enable the device to fetch
code from external program memory locations starting at 0000H up to FFFFH. Note, however,
that if lock bit 1 is programmed, EA will be internally latched on reset.
EA should be strapped to V
programming enable voltage (V
selected.
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting oscillator amplifier. XTAL2 should not drive a board-level clock without
a buffer.
ALE/PROG
EA / V
PSEN
RST
V
GND
PP
CC
EEPROM
CONTROL
REGISTER
TIMING
AND
OSC
B
RAM ADDR.
REGISTER
INSTRUCTION
REGISTER
WATCH
DOG
CC
ACC
for internal program executions. This pin also receives the 12-volt
TMP2
PP
) during Flash programming when 12-volt programming is
RAM
PORT 3 DRIVERS
PSW
P3.0 - P3.7
PORT 0 DRIVERS
PORT 3
LATCH
ALU
P0.0 - P0.7
PORT 0
LATCH
TMP1
INTERRUPT, SERIAL PORT,
AND TIMER BLOCKS
PORT 2
LATCH
PORT 1 DRIVERS
PORT 1
LATCH
PORT 2 DRIVERS
POINTER
P2.0 - P2.7
STACK
P1.0 - P1.7
FLASH
PORT
SPI
INCREMENTER
PROGRAM
PROGRAM
REGISTER
PROGRAM
ADDRESS
COUNTER
LOGIC
BUFFER
DUAL
DPTR
PC
3286P–MICRO–3/10
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