LFXP10C-5F388CES Lattice Semiconductor, LFXP10C-5F388CES Datasheet - Page 10

• Manufacturer Part Number: LFXP10C-5F388CES
• Description: Semiconductors and Actives, gate, Programmable Logic (FPGAs, PALs, CPLDs ...), programmable
• Manufacturer: Lattice Semiconductor

Lattice Semiconductor
Figure 2-5. Primary Clock Sources
Secondary Clock Sources
LatticeXP devices have four secondary clock resources per quadrant. The secondary clock branches are tapped at
every PFU. These secondary clock networks can also be used for controls and high fanout data. These secondary
clocks are derived from four clock input pads and 16 routing signals as shown in Figure 2-6.
Clock Input
PLL Input
PLL Input
Note: Smaller devices have two PLLs.
PLL
PLL
From Routing
From Routing
To Quadrant Clock Selection
20 Primary Clock Sources
Clock Input
Clock Input
2-7
From Routing
From Routing
LatticeXP Family Data Sheet
PLL
PLL
PLL Input
Clock Input
PLL Input
Architecture