LFXP10C-5F388CES Lattice Semiconductor, LFXP10C-5F388CES Datasheet - Page 41

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LFXP10C-5F388CES

Manufacturer Part Number
LFXP10C-5F388CES
Description
Semiconductors and Actives, gate, Programmable Logic (FPGAs, PALs, CPLDs ...), programmable
Manufacturer
Lattice Semiconductor
Datasheet
Lattice Semiconductor
Differential HSTL and SSTL
Differential HSTL and SSTL outputs are implemented as a pair of complementary single-ended outputs. All allow-
able single-ended output classes (class I and class II) are supported in this mode.
LVDS25E
The top and bottom side of LatticeXP devices support LVDS outputs via emulated complementary LVCMOS out-
puts in conjunction with a parallel resistor across the driver outputs. The scheme shown in Figure 3-1 is one possi-
ble solution for point-to-point signals.
Figure 3-1. LVDS25E Output Termination Example
Table 3-1. LVDS25E DC Conditions
BLVDS
The LatticeXP devices support BLVDS standard. This standard is emulated using complementary LVCMOS out-
puts in conjunction with a parallel external resistor across the driver outputs. BLVDS is intended for use when multi-
drop and bi-directional multi-point differential signaling is required. The scheme shown in Figure 3-2 is one possible
solution for bi-directional multi-point differential signals.
V
V
V
V
Z
I
DC
OH
OL
OD
CM
BACK
Parameter
VCCIO = 2.5V (±5%)
VCCIO = 2.5V (±5%)
ON-chip
Output high voltage
Output low voltage
Output differential voltage
Output common mode voltage
Back impedance
DC output current
OFF-chip
Over Recommended Operating Conditions
CAT16-LV4F12
Description
RS=165 ohms
(±1%)
RS=165 ohms
(±1%)
Bourns
Transmission line, Zo = 100 ohm differential
RD = 140 ohms
(±1%)
3-10
Typical
1.43
1.07
0.35
1.25
3.66
100
RD = 100 ohms
(±1%)
DC and Switching Characteristics
LatticeXP Family Data Sheet
OFF-chip ON-chip
+
-
Units
mA
Ω
V
V
V
V

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