ISPLSI5384VA-125LB272 Lattice Semiconductor, ISPLSI5384VA-125LB272 Datasheet - Page 15

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ISPLSI5384VA-125LB272

Manufacturer Part Number
ISPLSI5384VA-125LB272
Description
Manufacturer
Lattice Semiconductor
Datasheet

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1. Internal Timing Parameters are not tested and are for reference only.
Refer to Timing Model in this data sheet for further details.
INPUT
I/O
Pad
Internal Timing Parameters
Input
PARAM
GRP
t
t
Global Control Delays
t
t
t
t
t
t
t
ispLSI 5384VA Timing Model
Pad
grpi
grpm
gclk01
gclk23
gclken0
gclken1
grst
goe
toe
Input
Buffer
t
t
idcom
#23
#22
idreg
Input Buffers
#59
#60
#61
#62
#63
#64
#65
Dedicated
57
58
59
60
61
62
63
64
65
#
t
t
t
t
t
t
t
gclk01
gclk23
gclken0
gclken1
grst
goe
toe
#58
DESCRIPTION
GRP Delay from I/O Pad
GRP Delay from Macrocell
Global Clock 0 or 1 Delay
Global Clock 2 or 3 Delay
Global CLKEN 0 Delay
Global CLKEN 1 Delay
Global Set/Reset Delay
Global OE Delay
Test OE Delay
#57
GRP
t
t
grpm
grpi
Over Recommended Operating Conditions
1
AND Array
t
t
#41
andhs
andlp
#40
#42
#46
#44
t
t
t
5ptcom
ptsacom
5ptxcom
PT Controls
#51
#48
#52
#49
#50
#53
#54
#55
#56
GLB/Macrocell
PTSA
15
t
t
t
t
t
t
t
t
t
sck
pck
ptsacken
srst
prst
poe
gpoe
pcken
scken
#45
#47
#43
Specifications ispLSI 5384VA
t
t
t
5ptxreg
ptsareg
5ptreg
Register
MIN MAX MIN MAX MIN MAX
-125
#31
#32
#34
#35
#33
#37
#36
#38
#39
12.2
t
t
t
t
t
t
t
t
1.5
1.0
1.2
2.2
1.7
2.7
4.7
4.7
mbp
mlat
msu
mh
mco
mhce
msuce
mrst
t
ftog
-100
15.8
Buffer Delays
#24
#25
#26
1.2
1.7
2.7
2.4
3.4
6.3
6.2
2
t
t
t
Output
odcom
odreg
odz
Buffer
-70
#30
#29
#27
#28
23.4
1.2
2.4
4.4
3.4
5.4
9.4
9.4
Slew
3
t
t
t
t
slsd
slfd
slf
sls
Timing Rev 4.0
UNIT
OUTPUT
Pad
ns
ns
ns
ns
ns
ns
ns
ns
ns
I/O

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