853S9252BKILF IDT, 853S9252BKILF Datasheet - Page 14

• Manufacturer Part Number: 853S9252BKILF
• Description: Clock Drivers & Distribution
• Manufacturer: IDT

Specifications of 853S9252BKILF

• Product Category: Clock Drivers & Distribution
• Rohs: yes
• Part # Aliases: ICS853S9252BKILF

ICS853S9252I Data Sheet
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS853S9252I.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS853S9252I is the sum of the core power plus the power dissipation in the load(s).
The following is the power dissipation for V
Total Power = Power (core)
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad, and directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
a multi-layer board, the appropriate value is 74.7°C/W per Table 4 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 4. Thermal Resistance
ICS853S9252BKI REVISION A JULY 29, 2011
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
Power Dissipation.
•
•
•
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 * 31.6mW = 63.2mW
Power Dissipation for internal termination R
Power (R
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.222W * 74.7°C/W = 101.6°C. This is below the limit of 125°C.
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
T
)
MAX
MAX
= (V
MAX
= V
MAX
IN_MAX
= 30mW/Loaded Output pair
CC_MAX
+ Power (output)
θ
JA
)
2
/ R
* I
for 16 Lead VFQFN, Forced Convection
EE_MAX
T_MIN
CC
= 3.3V + 10% = 3.63V, which gives worst case results.
= (1.4V)
JA
= 3.63V * 33mA = 119.8mW
MAX
* Pd_total + T
T
+ Power (R
2
/ 50
Ω
= 39.2mW
θ
JA
A
T
)
74.7°C/W
by Velocity
MAX
0
14
= 119.8mW + 63.2mW + 39.2mW = 222.2mW
65.3°C/W
2.5V, 3.3V ECL/LVPECL CLOCK/DATA FANOUT BUFFER
JA
1
must be used. Assuming no air flow and
©2011 Integrated Device Technology, Inc.
58.5°C/W
2.5