IDT74SSTUBF32869ABKG IDT, Integrated Device Technology Inc, IDT74SSTUBF32869ABKG Datasheet
IDT74SSTUBF32869ABKG
Specifications of IDT74SSTUBF32869ABKG
800-1697
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IDT74SSTUBF32869ABKG Summary of contents
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CONFIGURABLE REGISTERED BUFFER FOR DDR2 Description The IDT74SSTUBF32869A is 14-bit 1:2 registered buffer with parity, designed for 1 1 All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Parity Implementation and Device Wiring PARIN, W4 PARIN NC, A8 Block Diagram V REF PARIN D1 (1) D14 DCS0 CSR DCKE DODT RESET CLK CLK NOTE: 1.This range does not include D1, D4, ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Block Diagram RESET CLK CLK D14 V REF 2 PARIN C1, C2 NOTE: 1.PARIN is used to generate PPO and PTYERR. 14-BIT CONFIGURABLE REGISTERED ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Pin Configuration QCKEA D Q2A E Q3A F QODTA G Q5A H Q6A J QCSA Q8A M Q9A N Q10A P Q11A ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 150 Ball CTBGA Package Attributes Top Marking TOP ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Function Table RESET DCS CSR ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Terminal Functions Signal Terminal Group Name Ungated DCKE, DODT Inputs Chip Select D1...D14 Gated Inputs Chip Select DCS, CSR Inputs Q1A...Q14A Q1B...Q14B Re-Driven QCSnA, B Outputs QCKEnA, B QODTnA, B Parity Input PARIN ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Parity and Standby Function Table RESET DCS CSR ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Absolute Maximum Ratings Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Operating Characteristics, T The RESET and Cn inputs of the device must be held at valid levels (not floating) to ensure proper device operation. The differential inputs must not be floating unless RESET ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 DC Electrical Characteristics Over Operating Range Following Conditions Apply Unless Otherwise Specified: Operating Condition 0°C to +70° Symbol Parameter PTYERR Output V ERROL ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Timing Requirements Over Recommended Operating Free-Air Temperature Range Symbol Parameter f Clock Frequency CLOCK t Pulse Duration, CLK, CLK HIGH or LOW Differential Inputs Active Time ACT 2 t Differential ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Output Buffer Characteristics Output edge rates over recommended operating free-air temperature range Parameter dV/dt_r dV/dt_f 1 dV/dt_∆ 1 Difference between dV/dt_r (rising edge rate) and dV/dt_f (falling edge rate). 14-BIT CONFIGURABLE REGISTERED BUFFER ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Register Timing RESET DCS CSR CLK CLK ( D14 ( Q14 (2) PARIN (2) PPO (2) PTYERR NOTES: 1.This range does not include D1, D4, and D7, and their ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Register Timing RESET DCS CSR CLK CLK ( D14 ( Q14 (2) PARIN (2) PPO (not used) (2) PTYERR NOTES: 1.This range does not include D1, D4, and D7, ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Test Circuits and Waveforms (V DUT CLK Out CLK Inputs CLK Test Point R 100 L = Test Point Simulation Load Circuit LVCMOS RESET Input t ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Test Circuits and Waveforms (V DUT Out Load Circuit: High-to-Low Slew-Rate Adjustment Output 80% 20% dv_f dt_f Voltage Waveforms: High-to-Low Slew-Rate Adjustment DUT Out ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Test Circuits and Waveforms (V DUT CLK CLK Output Partial Parity Out Voltage Waveform, Propagation Delay Time with Respect to CLK Input Cross Point Voltage ICR ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Application Information The typical values below are measured on standard JEDEC raw cards, using the JEDEC DDR2 register validation board running patterns 0x43, 0x4F, and 0x5A. Raw Card Values 1 Raw Card W ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Ordering Information IDT74SSTUBF XX XXX Family Device Type 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 XX X Package Shipping Carrier 8 Tape and Reel BKG Low Profile, Fine Pitch, Ball Grid Array 869A 14-Bit ...
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IDT74SSTUBF32869A 14-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2 Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States ...