MAX11120ATI+ Maxim Integrated, MAX11120ATI+ Datasheet - Page 28

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MAX11120ATI+

Manufacturer Part Number
MAX11120ATI+
Description
Analog to Digital Converters - ADC 8Bit 4Ch 1Msps Precision ADC
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX11120ATI+

Rohs
yes
Number Of Channels
4/2
Architecture
SAR
Conversion Rate
1 MSPs
Resolution
8 bit
Input Type
Single-Ended/Pseudo-Differential
Snr
49.6 dB
Interface Type
3-Wire, QSPI, SPI
Operating Supply Voltage
2.35 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
TQFN-28
Maximum Power Dissipation
2758 mW
Minimum Operating Temperature
- 40 C
Number Of Converters
1
Voltage Reference
1 V
The MAX11120–MAX11128 feature three power-down
modes.
The devices shut down when the SPM bits in the ADC
Configuration register are asserted
two shutdown options:
U Full shutdown where all circuitry is shutdown.
U Partial shutdown where all circuitry is powered down
Table 5. Power Management Modes
Table 6. ADC Configuration Register
Maxim Integrated
except for the internal bias generator.
PM1
CONFIG_SETUP
0
0
1
1
BIT NAME
REFSEL
AVGON
PM0
0
1
0
1
AutoShutdown
AutoStandby
15:11
BIT
10
9
Normal
MODE
1Msps, Low-Power, Serial 12-/10-/8-Bit,
DEFAULT
Power-Down Mode
STATE
N/A
(Table
0
0
Static Shutdown
All circuitry is fully powered up at all times.
The device enters full shutdown mode at the end of each conversion. All circuitry
is powered down. The device powers up following the falling edge of CS. It takes 2
cycles before valid conversions take place. The information in the registers is retained.
The device powers down all circuitry except for the internal bias generator. The part
powers up following the falling edge of CS. It takes 2 cycles before valid conversions
take place. The information in the registers is retained.
Unused.
6). There are
Set to 10000 to select the ADC Configuration register.
Set to 1 to turn averaging on. Valid for internal clock mode only.
Set to 0 to turn averaging off.
REFSEL
0
1
VOLTAGE REFERENCE
External single-ended
External differential
When the PM_ bits in the ADC Mode Control register are
asserted
edge of CS in the next frame. The device powers up
again at the following falling edge of CS. There are two
available options:
U AutoShutdown where all circuitry is shutdown.
U AutoStandby where all circuitry are powered down
The device shuts down after all conversions are complet-
ed. The device powers up again at the next falling edge
of CNVST or at the rising edge of CS after the SWCNV
bit is asserted.
except for the internal bias generator.
MAX11120–MAX11128
4-/8-/16-Channel ADCs
(Table
FUNCTION
AutoShutdown with External Clock Mode
AutoShutdown with Internal Clock Mode
FUNCTION
5), the device shuts down at the rising
AIN15 ( for the 16-channel devices)
REF- CONFIGURATION
REF-
28

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