MAX1273EUA+ Maxim Integrated, MAX1273EUA+ Datasheet - Page 10

• Manufacturer Part Number: MAX1273EUA+
• Description: Analog to Digital Converters - ADC FAULT-PROTECTED 12-BIT ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1273EUA+

• Rohs: yes
• Number Of Channels: 1
• Architecture: SAR
• Conversion Rate: 87 KSPs
• Resolution: 12 bit
• Input Type: Single-Ended
• Snr: Yes
• Interface Type: QSPI, Serial (SPI, Microwire)
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Package / Case: uMAX
• Maximum Power Dissipation: 727 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: Internal, External

Fault-Protected, 12-Bit ADCs
with Software-Selectable Input Range
Table 2. Input Range and Polarity Selection for MAX1272
Table 3. Input Range and Polarity Selection for MAX1273
Table 4. Power-Down Selection
Figure 3. Equivalent Input Circuit
10
INPUT RANGE
INPUT RANGE
AIN
______________________________________________________________________________________
S1 = BIPOLAR/UNIPOLAR SWITCH
S2 = INPUT MUX SWITCH
S3, S4 = T/H SWITCH
0 to V
0 to V
PD
0 to 10V
±V
1
0
R1
0 to 5V
±V
±10V
±5V
REF
REF
REF
REF
/2
/2
R3
4.8kΩ
S1
S2
R2
MODE1
HOLD
X
0
1
RNG
RNG
UNIPOLAR
OFF
ON
BIPOLAR
0
0
1
1
0
0
1
1
R1 = 11.3kΩ (MAX1272)
R2 = 7.8kΩ (MAX1272)
S3
or 4.8kΩ (MAX1273)
or ∞ (OPEN) (MAX1273)
TRACK
BIP
BIP
C
0
1
0
1
0
1
0
1
HOLD
MODE0
TRACK
X
0
1
0
1
S4
VOLTAGE
REFERENCE
-V
-V
FULL SCALE
FULL SCALE
T/H
OUT
HOLD
NEGATIVE
NEGATIVE
REF
REF
-V
Normal operation (ADCs always active). Automatically enters delayed
standby power-down mode between conversions.
Delayed standby power-down mode.
Immediate standby power-down mode.
Delayed full power-down mode.
Immediate full power-down mode.
-V
REF
× 1.2207
× 2.4414
—
—
—
—
REF
/2
Input data (control byte) clocks in at DIN on the rising
edge of SCLK. CS enables communication with the
MAX1272/MAX1273. After CS falls, the first arriving 1
represents the start bit (MSB) of the input control byte.
The start bit is defined as follows:
1) The first high bit clocked into DIN with CS low any
2) The first high bit clocked into DIN after bit 4 (D4) of a
See Table 1 for programming the control byte. Figure 4
shows the detailed serial interface timing.
Output data (DOUT) clocks out MSB first on the falling
edge of SCLK. The unipolar mode provides a straight
binary output. The bipolar mode provides a two’s com-
plement binary output. For output binary codes, see the
Transfer Function section.
time the converter is idle (e.g., after applying V
conversion in progress clocks out on DOUT.
ZERO SCALE
ZERO SCALE
0
0
0
0
0
0
0
0
MODE
Output Data Format
Input Data Format
V
V
V
V
FULL SCALE
FULL SCALE
REF
REF
REF
REF
V
V
V
V
REF
REF
× 1.2207
× 1.2207
× 2.4414
× 2.4414
REF
REF
/2
/2
DD
).