LC4512C-75FTN256I Lattice, LC4512C-75FTN256I Datasheet - Page 51

• Manufacturer Part Number: LC4512C-75FTN256I
• Description: CPLD - Complex Programmable Logic Devices ispJTAG 1.8V 7.5ns 512MC 208 I/O IND
• Manufacturer: Lattice

Specifications of LC4512C-75FTN256I

• Rohs: yes
• Memory Type: EEPROM
• Number Of Macrocells: 512
• Maximum Operating Frequency: 178.57 MHz
• Delay Time: 7.5 ns
• Number Of Programmable I/os: 208
• Operating Supply Voltage: 1.8 V
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Package / Case: FTBGA
• Mounting Style: SMD/SMT
• Number Of Product Terms Per Macro: 80
• Factory Pack Quantity: 450
• Supply Current: 4 mA
• Supply Voltage - Max: 1.95 V
• Supply Voltage - Min: 1.65 V

ispMACH 4064V/B/C/Z, 4128V/B/C/Z, 4256V/B/C/Z Logic Signal Connections:
100-Pin TQFP (Cont.)
Lattice Semiconductor
ispMACH 4128V/B/C Logic Signal Connections: 128-Pin TQFP
*This pin is input only.
Pin Number
100
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Pin Number
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Number
Bank
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
-
VCCO (Bank 1)
VCCO (Bank 0)
GND (Bank 0)
GLB/MC/Pad
D0/GOE1
A0/GOE0
ispMACH 4064V/B/C/Z
CLK3/I
CLK0/I
VCC
D3
D2
D1
A1
A2
A3
A4
A5
A6
A7
Bank Number
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ORP
D^3
D^2
D^1
D^0
A^0
A^1
A^2
A^3
A^4
A^5
A^6
A^7
-
-
-
-
-
-
51
VCCO (Bank 1)
VCCO (Bank 0)
GND (Bank 0)
GLB/MC/Pad
H0/GOE1
A0/GOE0
ispMACH 4128V/B/C/Z
CLK3/I
CLK0/I
ispMACH 4000V/B/C/Z Family Data Sheet
VCC
A10
A12
A14
H6
H4
H2
A2
A4
A6
A8
VCCO (Bank 0)
VCCO (Bank 0)
GND (Bank 0)
GLB/MC/Pad
GND
B10
B12
B13
B14
C14
TDI
B0
B1
B2
B4
B5
B6
B8
B9
ispMACH 4128V/B/C
ORP
H^3
H^2
H^1
H^0
A^0
A^1
A^2
A^3
A^4
A^5
A^6
A^7
-
-
-
-
-
-
VCCO (Bank 1)
VCCO (Bank 0)
GND (Bank 0)
GLB/MC/Pad
A2/GOE0
ispMACH 4256V/B/C/Z
P2/OE1
CLK3/I
CLK0/I
VCC
P12
P10
A10
A12
B10
B12
P6
A6
B2
B6
C^11
B^10
B^11
ORP
B^0
B^1
B^2
B^3
B^4
B^5
B^6
B^7
B^8
B^9
-
-
-
-
-
ORP
P^3
P^2
P^1
P^0
A^0
A^1
A^2
A^3
B^0
B^1
B^2
B^3
-
-
-
-
-
-