S9S12G96F0VLH Freescale Semiconductor, S9S12G96F0VLH Datasheet - Page 610

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S9S12G96F0VLH

Manufacturer Part Number
S9S12G96F0VLH
Description
16-bit Microcontrollers - MCU 16BIT 96K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G96F0VLH

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
96 KB
Data Ram Size
8192 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT

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Freescale’s Scalable Controller Area Network (S12MSCANV3)
18.3.3.1.1
612
Module Base + 0x00X0
Module Base + 0x00X1
ID[28:21]
ID[20:18]
ID[17:15]
Field
Field
SRR
IDE
7-0
7-5
2-0
4
3
Reset:
Reset:
W
W
R
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Substitute Remote Request — This fixed recessive bit is used only in extended format. It must be set to 1 by
the user for transmission buffers and is stored as received on the CAN bus for receive buffers.
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
IDR0–IDR3 for Extended Identifier Mapping
ID28
ID20
7
x
Figure 18-26. Identifier Register 0 (IDR0) — Extended Identifier Mapping
7
x
Figure 18-27. Identifier Register 1 (IDR1) — Extended Identifier Mapping
Table 18-27. IDR0 Register Field Descriptions — Extended
Table 18-28. IDR1 Register Field Descriptions — Extended
ID27
ID19
6
x
6
x
MC9S12G Family Reference Manual,
ID26
ID18
5
x
5
x
SRR (=1)
ID25
4
x
4
x
Description
Description
IDE (=1)
ID24
x
x
3
3
Rev.1.23
ID23
ID17
2
x
2
x
Freescale Semiconductor
ID22
ID16
x
x
1
1
ID21
ID15
0
x
0
x

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