MC9S12P32MFT Freescale Semiconductor, MC9S12P32MFT Datasheet - Page 169

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MC9S12P32MFT

Manufacturer Part Number
MC9S12P32MFT
Description
16-bit Microcontrollers - MCU 16 BIT 32K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC9S12P32MFT

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
32 MHz
Program Memory Size
32 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
Read: DBGACTL if COMRV[1:0] = 00
Write: DBGACTL if COMRV[1:0] = 00 and DBG not armed
Freescale Semiconductor
Address: 0x0028
Address: 0x0028
Address: 0x0028
(Comparators
(Comparators
Reset
Reset
Reset
A and B)
A and B)
Field
SZE
W
W
W
SZ
R
R
R
DBGBCTL if COMRV[1:0] = 01
DBGCCTL if COMRV[1:0] = 10
DBGBCTL if COMRV[1:0] = 01 and DBG not armed
DBGCCTL if COMRV[1:0] = 10 and DBG not armed
7
6
SZE
SZE
0
0
0
0
7
7
7
Figure 6-14. Debug Comparator Control Register DBGBCTL (Comparator B)
Figure 6-15. Debug Comparator Control Register DBGCCTL (Comparator C)
Figure 6-13. Debug Comparator Control Register DBGACTL (Comparator A)
Size Comparator Enable Bit — The SZE bit controls whether access size comparison is enabled for the
associated comparator. This bit is ignored if the TAG bit in the same register is set.
0 Word/Byte access size is not used in comparison
1 Word/Byte access size is used in comparison
Size Comparator Value Bit — The SZ bit selects either word or byte access size in comparison for the
associated comparator. This bit is ignored if the SZE bit is cleared or if the TAG bit in the same register is set.
0 Word access size is compared
1 Byte access size is compared
= Unimplemented or Reserved
= Unimplemented or Reserved
= Unimplemented or Reserved
SZ
SZ
0
0
0
0
6
6
6
Table 6-22. DBGXCTL Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
TAG
TAG
TAG
0
0
0
5
5
5
BRK
BRK
BRK
0
0
0
4
4
4
Description
RW
RW
RW
0
0
0
3
3
3
RWE
RWE
RWE
0
0
0
2
2
2
S12S Debug Module (S12SDBGV2)
NDB
0
0
0
0
0
1
1
1
COMPE
COMPE
COMPE
0
0
0
0
0
0
169

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