LCMXO640C-3F256I Lattice, LCMXO640C-3F256I Datasheet - Page 20
LCMXO640C-3F256I
Manufacturer Part Number
LCMXO640C-3F256I
Description
CPLD - Complex Programmable Logic Devices Use LCMXO640C-3FT256
Manufacturer
Lattice
Datasheet
1.LCMXO2280E-4TN100C.pdf
(95 pages)
Specifications of LCMXO640C-3F256I
Memory Type
SRAM
Number Of Macrocells
320
Maximum Operating Frequency
500 MHz
Delay Time
4.9 ns
Number Of Programmable I/os
159
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Package / Case
FPBGA
Mounting Style
SMD/SMT
Factory Pack Quantity
450
Supply Current
17 mA
Supply Voltage - Max
3.465 V
Supply Voltage - Min
1.71 V
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Table 2-8. I/O Support Device by Device
Table 2-9. Supported Input Standards
Number of I/O Banks
Type of Input Buffers
Types of Output Buffers
Differential Output
Emulation Capability
PCI Support
Single Ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI
Differential Interfaces
BLVDS
1. Top Banks of MachXO1200 and MachXO2280 devices only.
2. MachXO1200 and MachXO2280 devices only.
2
Single-ended
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
All I/O Banks
No
1
2
MachXO256
, LVDS
Input Standard
2
, LVPECL
2
, RSDS
4
Single-ended
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
All I/O Banks
No
MachXO640
2
2-17
3.3V
√
√
√
√
√
√
2.5V
√
√
√
√
√
VCCIO (Typ.)
8
Single-ended
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
All I/O Banks
Top side only
1.8V
MachXO1200
√
√
√
√
√
√
MachXO Family Data Sheet
1.5V
√
√
√
√
√
√
1.2V
√
√
√
√
√
8
Single-ended
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
All I/O Banks
Top side only
MachXO2280
Architecture
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