LCMXO640C-3F256I Lattice, LCMXO640C-3F256I Datasheet - Page 61
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LCMXO640C-3F256I
Manufacturer Part Number
LCMXO640C-3F256I
Description
CPLD - Complex Programmable Logic Devices Use LCMXO640C-3FT256
Manufacturer
Lattice
Datasheet
1.LCMXO2280E-4TN100C.pdf
(95 pages)
Specifications of LCMXO640C-3F256I
Memory Type
SRAM
Number Of Macrocells
320
Maximum Operating Frequency
500 MHz
Delay Time
4.9 ns
Number Of Programmable I/os
159
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Package / Case
FPBGA
Mounting Style
SMD/SMT
Factory Pack Quantity
450
Supply Current
17 mA
Supply Voltage - Max
3.465 V
Supply Voltage - Min
1.71 V
LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections:
144 TQFP
Lattice Semiconductor
Number
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
1
2
3
4
5
6
7
8
9
Function
GNDIO3
GNDIO3
GNDIO2
VCCIO3
VCCIO3
VCCIO2
PL10A
PL10B
PL10C
PL11A
PL10D
PL11C
PL11B
PL11D
PB2C
PB3A
PB3B
PB3C
PB3D
PB4A
PB4B
PB4C
PB4D
PL2A
PL2C
PL2B
PL3A
PL2D
PL3B
PL3C
PL3D
PL4A
PL4D
PL5A
PL5B
PL5D
PL6C
PL6D
PL7A
PL7B
PL8A
PL8B
PL8C
PL9C
PL9D
GND
VCC
TMS
TCK
TDO
Ball
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
-
-
LCMXO640
Function
TSALL
GSRN
Dual
TMS
TDO
TCK
Differential
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Function Bank
GNDIO7
GNDIO6
GNDIO5
VCCIO7
VCCIO6
VCCIO5
PL11C
PL13D
PL14C
PL14D
PL10A
PL10B
PL11A
PL11B
PL12B
PL14A
PL14B
PL15A
PL15B
PL16A
PL16B
PL3C
PL3D
PL4C
PL5C
PL6D
PL7C
PL7D
PB2C
PB2D
PB3A
PB3B
PB4A
PB4B
PB4D
PB5A
PB5B
PL2A
PL2B
PL3A
PL3B
PL4A
PL4B
PL6A
PL6B
GND
VCC
TMS
TCK
TDO
Ball
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
5
5
5
5
-
-
LCMXO1200
LLM0_PLLC_FB_A
LLM0_PLLT_FB_A
LLM0_PLLC_IN_A
4-17
LLM0_PLLT_IN_A
Function
TSALL
GSRN
Dual
TMS
TDO
TCK
Differential
C*
C*
C*
C*
C*
C*
C*
T*
T*
T*
T*
T*
T*
T*
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
Function
VCCIO7
GNDIO7
VCCIO6
GNDIO6
GNDIO5
VCCIO5
MachXO Family Data Sheet
PL13A
PL13B
PL13D
PL14D
PL14C
PL15B
PL16D
PL17A
PL17B
PL17C
PL17D
PL18A
PL18B
PL19A
PL19B
PL3C
PL3D
PL4C
PL6C
PL7D
PL9C
PL9D
PB2A
PB2B
PB3A
PB3B
PB4A
PB4B
PB4D
PB5A
PB5B
PL2A
PL2B
PL3A
PL3B
PL4A
PL4B
PL7A
PL7B
GND
VCC
TMS
TDO
TCK
Ball
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
5
5
5
5
-
-
Pinout Information
LCMXO2280
LUM0_PLLC_FB_A
LLM0_PLLC_FB_A
LUM0_PLLT_FB_A
LUM0_PLLC_IN_A
LLM0_PLLT_FB_A
LUM0_PLLT_IN_A
LLM0_PLLC_IN_A
LLM0_PLLT_IN_A
Function
TSALL
GSRN
Dual
TMS
TCK
TDO
Differential
T*
C*
T*
C*
T*
C*
T*
C*
T*
C*
T*
C*
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T