100LVEL16MX Fairchild Semiconductor, 100LVEL16MX Datasheet

IC RECEIVER 3.3V ECL DIFF 8SOIC

100LVEL16MX

Manufacturer Part Number
100LVEL16MX
Description
IC RECEIVER 3.3V ECL DIFF 8SOIC
Manufacturer
Fairchild Semiconductor
Series
100LVELr
Datasheet
1.100LVEL16M.pdf (6 pages)

Specifications of 100LVEL16MX

Logic Type
ECL Differential Receiver
Supply Voltage
3 V ~ 3.8 V
Number Of Bits
1
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Logic Family
100LV
Supply Voltage (max)
3.8 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Interface
EIA/JESD78
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
/ /
Supply Current
24 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2003 Fairchild Semiconductor Corporation
100LVEL16M
100LVEL16M8
(Preliminary)
100LVEL16
3.3V ECL Differential Receiver
General Description
The 100LVEL16 is a low voltage differential receiver that
contains an internally supplied voltage source, V
used in a single ended input condition the unused input
must be tied to V
0.01 F capacitor to decouple V
the current sinking or sourcing capability to 0.5mA. When
V
With inputs open the differential Q outputs default LOW
and Q outputs default HIGH.
The 100 series is temperature compensated.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Pin Descriptions
Order Number
BB
is not used it should be left open.
Pin Name
Q, Q
D, D
V
V
V
NC
CC
BB
EE
BB
Package
Number Top Mark
MA08D
. When operating in this mode use a
M08A
Top View
Product
ECL Data Outputs
ECL Data Inputs
Reference Voltage
Positive Supply
Negative Supply
No Connect
KVL16
Code
KV16
BB
and V
Description
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
CC
and also limit
DS500776
BB
. When
Features
Logic Diagram
Typical propagation delay of 300 ps
Typical I
Internal pull-down resistors on D
Fairchild MSOP-8 package is a drop-in replacement to
ON TSSOP-8
Meets or exceeds JEDEC specification EIA/JESD78 IC
latch-up test
Moisture Sensitivity Level 1
ESD Performance:
Human Body Model
Machine Model
Package Description
EE
of 17 mA
150V
2000V
January 2003
Revised February 2003
www.fairchildsemi.com

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100LVEL16MX Summary of contents

Page 1

... ECL Data Inputs V Reference Voltage BB V Positive Supply CC V Negative Supply Connect © 2003 Fairchild Semiconductor Corporation Features Typical propagation delay of 300 ps . When Typical Internal pull-down resistors on D Fairchild MSOP-8 package is a drop-in replacement to and also limit ON TSSOP-8 Meets or exceeds JEDEC specification EIA/JESD78 IC ...

Page 2

Absolute Maximum Ratings PECL Supply Voltage ( NECL Supply Voltage ( PECL DC Input Voltage ( NECL DC Input Voltage ( ...

Page 3

LVNECL DC Electrical Characteristics Symbol Parameter I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single Ended Input LOW Voltage (Single Ended ...

Page 4

Switching Waveforms FIGURE 1. Differential to Differential Propagation Delay FIGURE 2. Differential Output Edge Rates FIGURE 3. Single Ended to Differential Propagation Delay www.fairchildsemi.com 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M08A 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the ...

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