S9S12G64F0MLH Freescale Semiconductor, S9S12G64F0MLH Datasheet - Page 502
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S9S12G64F0MLH
Manufacturer Part Number
S9S12G64F0MLH
Description
16-bit Microcontrollers - MCU S12 Core,64k Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G64F0MLH
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-64
Mounting Style
SMD/SMT
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Analog-to-Digital Converter (ADC12B12CV2)
14.3.2.3
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime
504
Module Base + 0x0002
Reset
W
R
1
ETRIGSEL
Only if ETRIG3-0 input option is available (see device specification), else ETRISEL is ignored, that means
external trigger source is still on one of the AD channels selected by ETRIGCH3-0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
ATD Control Register 2 (ATDCTL2)
0
0
7
ETRIGCH3
= Unimplemented or Reserved
AFFC
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
0
6
Table 14-5. External Trigger Channel Select Coding
Figure 14-5. ATD Control Register 2 (ATDCTL2)
ETRIGCH2
MC9S12G Family Reference Manual,
Reserved
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
5
ETRIGCH1
ETRIGLE
X
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
4
ETRIGCH0
ETRIGP
X
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
3
Rev.1.23
ETRIGE
External trigger source is
0
2
Reserved
Reserved
ETRIG0
ETRIG1
ETRIG2
ETRIG3
AN10
AN11
AN11
AN11
AN11
AN11
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
Freescale Semiconductor
ASCIE
1
1
1
1
0
1
ACMPIE
0
0
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