MAX1109EUB Maxim Integrated, MAX1109EUB Datasheet - Page 15

• Manufacturer Part Number: MAX1109EUB
• Description: Analog to Digital Converters - ADC
• Manufacturer: Maxim Integrated

Specifications of MAX1109EUB

• Number Of Channels: 2
• Architecture: SAR
• Conversion Rate: 50 KSPS
• Resolution: 8 bit
• Input Type: Single-Ended/Pseudo-Differential
• Snr: Yes
• Interface Type: 4-Wire (SPI, Microwire), QSPI
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: uMAX-10
• Maximum Power Dissipation: 444 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 1
• Voltage Reference: 4.096 V

CS does not need to be held low once a conversion is
started. Pulling CS high prevents data from being
clocked into the MAX1108/MAX1109 and three-states
DOUT, but it does not adversely affect an internal
clock-mode conversion already in progress. In this
mode, data can be shifted in and out of the
MAX1108/MAX1109 at clock rates up to 2MHz, provid-
ed that the minimum acquisition time (t
above 1µs.
Figure 8. Single Conversion Timing, Internal Clock Mode
Figure 9. Quick-Look Schematic
*CONVERSION RESULT = 10101010
ANALOG
INPUT
DOUT
SCLK
DIN
A/D STATE
CS
0.01µF
C1
1µF
______________________________________________________________________________________
START
1
IDLE
CH0
COM
REF
SEL2
SEL0
MAX1108
MAX1109
SEL1
4
I/EREF I/ECLK
DOUT
SCLK
t
GND
ACQ
V
DIN
CS
DD
ACQ
SHDN
REF
SHDN
) is kept
2-Channel, Serial 8-Bit ADCs
8
0.1µF
35 s MAX
Single-Supply, Low-Power,
t
CONV
V
DD
To quickly evaluate the MAX1108/MAX1109’s analog
performance, use the circuit of Figure 9. The device
requires a control byte to be written to DIN before each
conversion. Tying CS to GND and DIN to V
control bytes of FFH. In turn, this triggers single-ended,
unipolar conversions on CH0 in relation to COM in
external clock mode without powering down between
conversions. Apply an external 50kHz to 500kHz clock
D7
1µF
OSCILLATOR
D6
500kHz
V
10
SUPPLY
D5
D4
D3
CH1
D2
14
D1
OSCILLOSCOPE
D0
MSB
5 s/div
IDLE
CH2
LSB
18
Quick Look
DD
feeds in
DOUT*
SCLK
15