C8051F960-A-GQ Silicon Labs, C8051F960-A-GQ Datasheet - Page 103
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C8051F960-A-GQ
Manufacturer Part Number
C8051F960-A-GQ
Description
8-bit Microcontrollers - MCU 128KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F960-A-GQ
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
128 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
Available stocks
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Company:
Part Number:
C8051F960-A-GQ
Manufacturer:
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Quantity:
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6. Programmable Current Reference (IREF0)
C8051F96x devices include an on-chip programmable current reference (source or sink) with two output
current settings: Low Power Mode and High Current Mode. The maximum current output in Low Power
Mode is 63 µA (1 µA steps) and the maximum current output in High Current Mode is 504 µA (8 µA steps).
The current source/sink is controlled though the IREF0CN special function register. It is enabled by setting
the desired output current to a non-zero value. It is disabled by writing 0x00 to IREF0CN. The port I/O pin
associated with ISRC0 should be configured as an analog input and skipped in the Crossbar. See “Port
Input/Output” on page 351 for more details.
SFR Definition 6.1. IREF0CN: Current Reference Control
SFR Page = 0x0; SFR Address = 0xB9
6.1. PWM Enhanced Mode
The precision of the current reference can be increased by fine tuning the IREF0 output using a PWM sig-
nal generated by the PCA. This mode allows the IREF0DAT bits to perform a course adjustment on the
IREF0 output. Any available PCA channel can perform a fine adjustment on the IREF0 output. When
enabled (PWMEN = 1), the CEX signal selected using the PWMSS bit field is internally routed to IREF0 to
control the on time of a current source having the weight of 2 LSBs. With the two least significant bits of
IREF0DAT set to 00b, applying a 100% duty cycle on the CEX signal will be equivalent to setting the two
LSBs of IREF0DAT to 10b. PWM enhanced mode is enabled and setup using the IREF0CF register.
Name
Reset
Type
Bit
5:0
7
6
Bit
IREF0DAT[5:0] IREF0 Data Word.
MDSEL
SINK
R/W
Name
SINK
7
0
MODE
R/W
IREF0 Current Sink Enable.
Selects if IREF0 is a current source or a current sink.
0: IREF0 is a current source.
1: IREF0 is a current sink.
IREF0 Output Mode Select.
Selects Low Power or High Current Mode.
0: Low Power Mode is selected (step size = 1 µA).
1: High Current Mode is selected (step size = 8 µA).
Specifies the number of steps required to achieve the desired output current.
Output current = direction x step size x IREF0DAT.
IREF0 is in a low power state when IREF0DAT is set to 0x00.
6
0
5
0
Rev. 0.5
4
0
Function
3
0
IREF0DAT
R/W
2
0
C8051F96x
1
0
0
0
103
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