74AVC8T245PW,118 NXP Semiconductors, 74AVC8T245PW,118 Datasheet - Page 13

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74AVC8T245PW,118

Manufacturer Part Number
74AVC8T245PW,118
Description
IC TRANSCVR 3ST 8BIT 24TSSOP
Manufacturer
NXP Semiconductors
Series
74AVCr
Datasheet

Specifications of 74AVC8T245PW,118

Output Type
Logic
Package / Case
24-TSSOP
Logic Function
Translator, Bidirectional, 3-State
Number Of Bits
8
Input Type
Logic
Number Of Channels
1
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3ns
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Supply Voltage
1.2 V ~ 3.6 V
Logic Family
AVC
Number Of Channels Per Chip
8
Input Level
CMOS
Output Level
CMOS
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Propagation Delay Time
14.4 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Function
Bus Transceiver with Voltage Translation
Input Bias Current (max)
70 uA
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Polarity
Non-Inverting
Logic Type
CMOS
Number Of Circuits
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4754-2
74AVC8T245PW,118
74AVC8T245PW-T
74AVC8T245PW-T
935284593118
NXP Semiconductors
11. Waveforms
Table 14.
[1]
[2]
74AVC8T245_2
Product data sheet
Supply voltage
V
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Fig 5.
Fig 6.
CC(A)
V
V
CCI
CCO
, V
is the supply voltage associated with the data input port.
CC(B)
is the supply voltage associated with the output port.
Measurement points are given in
V
The data input (An, Bn) to output (Bn, An) propagation delay times
Measurement points are given in
V
Enable and disable times
OL
OL
Measurement points
and V
and V
OH
OH
are typical output voltage levels that occur with the output load.
are typical output voltage levels that occur with the output load.
HIGH-to-OFF
OFF-to-HIGH
OFF-to-LOW
LOW-to-OFF
Input
V
0.5V
0.5V
0.5V
OE input
M
output
output
CCI
CCI
CCI
[1]
Bn, An output
An, Bn input
V
GND
GND
Table
V
Table
CCO
V
OH
OL
V
GND
V
I
V
OH
OL
V
14.
14.
I
enabled
Rev. 02 — 28 April 2009
V
outputs
M
Output
V
0.5V
0.5V
0.5V
t
PLZ
t
PHZ
M
V
M
CCO
CCO
CCO
V
M
[2]
t
V
PHL
X
V
Y
8-bit dual supply translating transceiver; 3-state
disabled
outputs
V
V
V
V
X
OL
OL
OL
t
PZL
t
PZH
t
001aai475
+ 0.1 V
+ 0.15 V
+ 0.3 V
PLH
V
M
V
M
001aai474
outputs
enabled
74AVC8T245
V
V
V
V
Y
OH
OH
OH
© NXP B.V. 2009. All rights reserved.
0.1 V
0.15 V
0.3 V
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