S9S12GN32F0VLC Freescale Semiconductor, S9S12GN32F0VLC Datasheet - Page 37
S9S12GN32F0VLC
Manufacturer Part Number
S9S12GN32F0VLC
Description
16-bit Microcontrollers - MCU 16-bit32k Flash 2k RAM
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12GN16F0CFT.pdf
(1292 pages)
Specifications of S9S12GN32F0VLC
Product Category
16-bit Microcontrollers - MCU
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
32 KB
Data Ram Size
2048 B
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
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Chapter 1
Device Overview MC9S12G-Family
Revision History
1.1
The MC9S12G-Family is an optimized, automotive, 16-bit microcontroller product line focused on
low-cost, high-performance, and low pin-count. This family is intended to bridge between high-end 8-bit
microcontrollers and high-performance 16-bit microcontrollers, such as the MC9S12XS-Family. The
MC9S12G-Family is targeted at generic automotive applications requiring CAN or LIN/J2602
Freescale Semiconductor
Rev 0.25
Rev 0.26
Rev 0.27
Rev 0.28
Rev 0.29
Rev 0.30
Rev 0.31
Rev 0.32
Rev 0.33
Rev 0.34
Number
Version
Introduction
11-May-2011
07-May-2012
18-Feb-2011
21-Feb-2011
10-Feb-2012
15-Mar-2012
27-Sep-2012
10-Jan-2011
25-Jan-2013
1-Apr-2011
Revision
Date
Added KGD option for the S12GA192 and the S12GA240
• Added
• Corrected
• Corrected
• Corrected
• Corrected
• Typos and formatting
• Updated
• Updated
• Updated
• Typos and formatting
• Typos and formatting
•
• Corrected
• Updated
• Typos and formatting
• Updated
• Updated
• Updated
• Added
• Added
• Added
• Typos and formatting
• Updated
• Typos and formatting
• Corrected
• Corrected
• Corrected
• Updated
• Corrected
• Corrected
MC9S12G Family Reference Manual, Rev.1.23
Section 1.14, “Autonomous Clock (ACLK)
Section 1.8.2, “S12GNA16 and
Section 1.8.5, “S12GA48 and
Section 1.8.7, “S12GA96 and
Table
Section 1.3.14, “Analog-to-Digital Converter Module
Table 1-38
Table
Table 1-1
Figure 1-1
Table 1-5
Section 1.19, “BDM Clock Source
Table 1-1
Figure 1-15
Figure 1-10
Figure 1-16
Figure 1-12
Figure 1-4
Figure 1-4
Figure 1-5
Figure 1-6
Table 1-2
Table 1-6
1-1(added temperatur sensor feature)
1-5(added mask set 1N75C)
(added S12GSA devices)
(added S12GA devices)
Description of Changes
S12GA64”
S12GA128”
S12GNA32”
Connectivity”
Configuration”
(ADC)”
39
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