CYUSB3014-BZXC Cypress Semiconductor, CYUSB3014-BZXC Datasheet - Page 10

• Manufacturer Part Number: CYUSB3014-BZXC
• Description: ARM Microcontrollers - MCU EZUSB SuperSpeedCtrl X32 256KB
• Manufacturer: Cypress Semiconductor

Specifications of CYUSB3014-BZXC

• Rohs: yes
• Core: ARM926EJ-S
• Processor Series: CYUSB301x
• Data Bus Width: 16 bit/32 bit
• Maximum Clock Frequency: 200 MHz
• Data Ram Size: 512 KB
• Operating Supply Voltage: 3.2 V to 6 V
• Package / Case: BGA-121
• Mounting Style: SMD/SMT
• Interface Type: I2C, I2S, SPI, UART, USB
• Number Of Timers: 1
• Supply Voltage - Max: 6 V
• Supply Voltage - Min: 3.2 V

Table 6. Entry and Exit Methods for Low-Power Modes
Document Number: 001-52136 Rev. *L
Suspend Mode with
USB 3.0 PHY
Enabled (L1)
Suspend Mode with
USB 3.0 PHY
Disabled (L2)
Low-Power Mode
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
The power consumption in this mode does
not exceed ISB
USB 3.0 PHY is enabled and is in U3 mode
(one of the suspend modes defined by the
USB 3.0 specification). This one block
alone is operational with its internal clock
while all other clocks are shut down
All I/Os maintain their previous state
Power supply for the wakeup source and
core power must be retained. All other
power domains can be turned on/off
individually
The states of the configuration registers,
buffer memory, and all internal RAM are
maintained
All transactions must be completed before
FX3 enters Suspend mode (state of
outstanding transactions are not
preserved)
The firmware resumes operation from
where it was suspended (except when
woken up by RESET# assertion) because
the program counter does not reset
The power consumption in this mode does
not exceed ISB
USB 3.0 PHY is disabled and the USB
interface is in suspend mode
The clocks are shut off. The PLLs are
disabled
All I/Os maintain their previous state
USB interface maintains the previous
state
Power supply for the wakeup source and
core power must be retained. All other
power domains can be turned on/off
individually
The states of the configuration registers,
buffer memory and all internal RAM are
maintained
All transactions must be completed before
FX3 enters Suspend mode (state of
outstanding transactions are not
preserved)
The firmware resumes operation from
where it was suspended (except when
woken up by RESET# assertion) because
the program counter does not reset
Characteristics
1
2
■
■
■
■
Firmware executing on
ARM926EJ-S core can put FX3 into
suspend mode. For example, on
USB suspend condition, firmware
may decide to put FX3 into suspend
mode
External Processor, through the use
of mailbox registers, can put FX3 into
suspend mode
Firmware executing on
ARM926EJ-S core can put FX3 into
suspend mode. For example, on
USB suspend condition, firmware
may decide to put FX3 into suspend
mode
External Processor, through the use
of mailbox registers can put FX3 into
suspend mode
Methods of Entry
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
D+ transitioning to low
or high
D- transitioning to low
or high
Impedance change on
OTG_ID pin
Resume condition on
SSRX±
Detection of VBUS
Level detect on
UART_CTS (program-
mable polarity)
GPIF II interface
assertion of CTL[0]
Assertion of RESET#
D+ transitioning to low
or high
D- transitioning to low
or high
Impedance change on
OTG_ID pin
Resume condition on
SSRX±
Detection of VBUS
Level detect on
UART_CTS (program-
mable polarity)
GPIF II interface
assertion of CTL[0]
Assertion of RESET#
Methods of Exit
CYUSB301X
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