SiM3C157-B-GM Silicon Labs, SiM3C157-B-GM Datasheet - Page 34

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SiM3C157-B-GM

Manufacturer Part Number
SiM3C157-B-GM
Description
ARM Microcontrollers - MCU 128KB LGA92
Manufacturer
Silicon Labs
Datasheet

Specifications of SiM3C157-B-GM

Rohs
yes
Core
ARM Cortex M3
Processor Series
SIM3C1xx
Data Bus Width
32 bit
Maximum Clock Frequency
80 MHz
Program Memory Size
128 KB
Data Ram Size
42 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
LGA-92
Mounting Style
SMD/SMT
Interface Type
2 x I2C, I2S, 3 x SPI, 2 x USART, 2 x UART
Number Of Programmable I/os
75
Number Of Timers
12 x 32 bit
Supply Voltage - Max
3.6 V
SiM3C1xx
4.1. Power
4.1.1. LDO and Voltage Regulator (VREG0)
The SiM3C1xx devices include two internal regulators: the core LDO Regulator and the Voltage Regulator
(VREG0).
The LDO Regulator converts a 1.8–3.6 V supply to the core operating voltage of 1.8 V. This LDO consumes little
power and provides flexibility in choosing a power supply for the system.
The Voltage Regulator regulates from 5.5 to 2.7 V and can serve as an input to the LDO. This allows the device to
be powered from up to a 5.5 V supply without any external components other than bypass capacitors.
4.1.2. Voltage Supply Monitor (VMON0)
The SiM3C1xx devices include a voltage supply monitor which allows devices to function in known, safe operating
condition without the need for external hardware. The supply monitor includes additional circuitry that can monitor
the main supply voltage and the VREGIN input voltage divided by 4 (VREGIN / 4).
The supply monitor module includes the following features:
4.1.3. External Regulator (EXTVREG0)
The External Regulator provides all the circuitry needed for a high-power regulator except the power transistor
(NPN or PNP) and current sensing resistor (if current limiting is enabled).
The External Regulator module has the following features:
4.1.4. Power Management Unit (PMU)
The Power Management Unit on the SiM3C1xx manages the power systems of the device. On power-up, the PMU
ensures the core voltages are a proper value before core instruction execution begins. It also recognizes and
manages the various wake sources for low-power modes of the device.
The PMU module includes the following features:
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Interfaces with either an NPN or PNP external transistor that serves as the pass device for the high current
The Low Power Timer, RTC0 (alarms and oscillator fail), Comparator 0, and the RESET pin can also serve
Main supply “VDD Low” (VDD below the early warning threshold) notification.
Holds the device in reset if the main VDD supply drops below the VDD Reset threshold.
VREGIN divided by 4 (VREGIN / 4) supply “VREGIN Low” notification.
regulator.
Automatic current limiting.
Automatic foldback limiting.
Sources up to 1 A for use by external circuitry.
Variable output voltage from 1.8–3.6 V in 100 mV steps.
Up to 16 pin wake inputs can wake the device from Power Mode 9.
as wake sources for Power Mode 9.
All PM9 wake sources (except for the RESET pin) can also reset the Low Power Timer or RTC0 modules.
Disables the level shifters to pins and peripherals to further reduce power usage in PM9. These level
shifters must be re-enabed by firmware after exiting PM9.
Provides a PMU_Asleep signal to a pin as an indicator that the device is in PM9.
Rev.1.0

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