MK22FX512VLQ10 Freescale Semiconductor, MK22FX512VLQ10 Datasheet - Page 40

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MK22FX512VLQ10

Manufacturer Part Number
MK22FX512VLQ10
Description
ARM Microcontrollers - MCU K20_1MB
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MK22FX512VLQ10

Rohs
yes
Core
ARM Cortex M0
Processor Series
MK22FX512
Data Bus Width
32 bit
Maximum Clock Frequency
100 MHz
Program Memory Size
512 KB
Data Ram Size
64 KB
On-chip Adc
Yes
Operating Supply Voltage
1.71 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT
A/d Bit Size
16 bit
Interface Type
CAN, I2C, I2S, SPI, UART, USB
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
On-chip Dac
Yes
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
1.71 V
Vybrid VF5xx Family
Single-core solution with dual Ethernet and L2 switch
for automation and control
The VF5xx family features the ARM
Cortex
500 MHz with 512 KB L2 cache,
dual USB 2.0 OTG controllers
with integrated PHY, dual 10/100
Ethernet controllers with L2 switch,
1 MB of on-chip SRAM and a rich
suite of communication, connectivity
and human-machine interfaces
(HMI). The VF5xx family is pin and
software compatible with the
VF4xx family.
Target Applications
• Industrial control
• Networked HVAC systems
• Portable consumer devices
• Networked audio system
40
-A5 core with speeds up to
®
Embedded Solutions Based on ARM
Mixed-Signal Capability
• Two 12-bit ADCs with configurable
• Two 12-bit DACs for analog waveform
Memory
• Dual Quad SPI supporting a double data
• Boot ROM with optional high assurance
• Up to 1 MB on-chip SRAM with ECC
resolution. Single or differential output
mode operation for improved noise
rejection. 500 ns conversion time
achievable with programmable delay
block triggering
generation for audio applications or
sensor manipulation
rate interface, an enhanced read data
buffering scheme, execute-in-place (XiP)
and support for dual-die flashes
boot for secure booting capability
support on 512 KB
Vybrid VF5xx Family
Periodic Interrupt Timers
NAND Flash Controller
Faraday F500 Block Diagram
External Bus Interface
Memory Interfaces
IEEE
Low-Power Timers
Debug and Trace
FlexTimer (8-ch.)
FlexTimer (2-ch.)
FlexTimer (2-ch.)
FlexTimer (8-ch.)
DDR Controller
Quad SPI x2
1 MB SRAM
Boot ROM
®
Memory
Timers
Trace
1588 Timers
JTAG
Video Interface w/Camera
Power Management
External Watchdog
Memory Protection
OpenVG GPU
Internal and
Up to 64-ch.
AMBA NIC
Regulators
TFT LCD
Interrupt
System
Display
Router
SAI x4
SPDIF
Video
Audio
ASRC
DMA
ESAI
Unit
®
• 16-bit DDR controller with PHY and ECC
Performance
• ARM Cortex-A5 core with frequency
• Up to 64-channel DMA for peripheral
• Crossbar switch enables concurrent multi-
Technology
Crypytography Module
ARM
support capable of DDR3/LPDDR2 800
MHz data rate
up to 500 MHz, with double precision
floating point, NEON media processing
engine for acceleration of media and
signal processing, and TrustZone security
extension. 32 KB each of instruction and
data L1 cache and 512 KB L2 cache for
optimized bus bandwidth and on-chip
SRAM execution performance
and memory servicing with reduced CPU
loading and faster system throughput
master bus accesses, increasing bus
bandwidth
Tamper Detect
Up to 500 MHz
Secure WDOG
Secure Fuses
L1 I/D-Cache
Secure RAM
Secure JTAG
Trace/Debug
Secure RTIC
Secure RTC
L2 Cache
®
Security
DP-FPU
NEON
Cortex™-A5
Core
GIC
UART x6
Low/High Frequency
DSPI x4
Internal Reference
USB Host + PHY
Secure Digital x2
Communication
USB OTG + PHY
(with Interrupt)
12-bit ADC x2
12-bit DAC x2
Ethernet x2
Oscillators
IEEE 1588
LS/FS/HS
LS/FS/HS
141 GPIO
L2Switch
Monitors
Analog
Clocks
Clocks
Clock
PLL
CAN x2
I
2
C x4

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