LPC1111FDH20/002,5 NXP Semiconductors, LPC1111FDH20/002,5 Datasheet - Page 75
LPC1111FDH20/002,5
Manufacturer Part Number
LPC1111FDH20/002,5
Description
ARM Microcontrollers - MCU CortexM0 32bit 8KB
Manufacturer
NXP Semiconductors
Datasheet
1.LPC1114FN2810212.pdf
(114 pages)
Specifications of LPC1111FDH20/002,5
Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1111
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
8 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
Factory Pack Quantity
2500
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LPC111X
Product data sheet
9.6 Peripheral power consumption
The supply current per peripheral is measured as the difference in supply current between
the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG
and PDRUNCFG (for analog blocks) registers. All other blocks are disabled in both
registers and no code is executed. Measured on a typical sample at T
noted otherwise, the system oscillator and PLL are running in both measurements.
The supply currents are shown for system clock frequencies of 12 MHz and 48 MHz.
Table 17.
Peripheral
IRC
System oscillator
at 12 MHz
Watchdog
oscillator at
500 kHz/2
BOD
Main PLL
ADC
CLKOUT
CT16B0
CT16B1
CT32B0
CT32B1
GPIO
IOCONFIG
I2C
ROM
SPI0
SPI1
UART
WDT/WWDT
Power consumption for individual analog and digital blocks
All information provided in this document is subject to legal disclaimers.
Typical supply current in
mA
n/a
0.27
0.22
0.004
0.051
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Rev. 8 — 20 February 2013
12 MHz 48 MHz
-
-
-
-
0.21
0.08
0.12
0.02
0.02
0.02
0.02
0.23
0.03
0.04
0.04
0.12
0.12
0.22
0.02
-
-
-
-
-
0.29
0.47
0.06
0.06
0.07
0.06
0.88
0.10
0.13
0.15
0.45
0.45
0.82
0.06
LPC1110/11/12/13/14/15
Notes
System oscillator running; PLL off; independent
of main clock frequency.
IRC running; PLL off; independent of main clock
frequency.
System oscillator running; PLL off; independent
of main clock frequency.
Independent of main clock frequency.
Main clock divided by 4 in the CLKOUTDIV
register.
GPIO pins configured as outputs and set to
LOW. Direction and pin state are maintained if
the GPIO is disabled in the SYSAHBCLKCFG
register.
Main clock selected as clock source for the
WDT.
32-bit ARM Cortex-M0 microcontroller
amb
© NXP B.V. 2013. All rights reserved.
= 25 C. Unless
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