STM32F207ICH6 STMicroelectronics, STM32F207ICH6 Datasheet - Page 50
STM32F207ICH6
Manufacturer Part Number
STM32F207ICH6
Description
ARM Microcontrollers - MCU 32-Bit ARM Cortex M3 CAM 256 kB
Manufacturer
STMicroelectronics
Datasheet
1.STM32F207VFT6TR.pdf
(177 pages)
Specifications of STM32F207ICH6
Product Category
ARM Microcontrollers - MCU
Rohs
yes
Core
ARM Cortex M3
Data Bus Width
32 bit
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Pinouts and pin description
Table 6.
1. I = input, O = output, S = supply, HiZ = high impedance.
2. FT = 5 V tolerant; TT = 3.6 V tolerant.
3. Function availability depends on the chosen device.
4. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only sinks a limited amount of current
5. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after
6. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1).
7. If the device is delivered in an UFBGA176 package and if the REGOFF pin is set to V
8. FSMC_NL pin is also named FSMC_NADV on memory devices.
9. RFU means “reserved for future use”. This pin can be tied to V
50/177
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(3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited: the speed should not exceed 2 MHz with a
maximum load of 30 pF and these I/Os must not be used as a current source (e.g. to drive an LED).
reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC
register description sections in the STM32F20x and STM32F21x reference manual, available from the STMicroelectronics
website: www.st.com.
as an internal Reset (active low).
C8
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Pins
STM32F20x pin and ball definitions (continued)
Table 7.
- 173 D4
- 174 C4
- 175 C3
- 176 C2
-
Pins
PE2
PE3
PE4
PE5
PE6
PF0
PF1
PF2
PF3
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FSMC pin definition
CF
A0
A1
A2
A3
Pin name
IRROFF
PI4
PI5
PI6
PI7
NOR/PSRAM/S
RAM
A23
A19
A20
A21
A22
Doc ID 15818 Rev 9
A0
A1
A2
A3
I/O FT
I/O FT
I/O FT
I/O FT
I/O
DD
(after reset)
function
FSMC
,V
NOR/PSRAM Mux
IRROFF
SS
Main
PI4
PI5
PI6
PI7
or left unconnected.
A23
A19
A20
A21
A22
(3)
TIM8_BKIN / DCMI_D5/
TIM8_CH2 / DCMI_D6/
TIM8_CH3 / DCMI_D7/
Alternate functions
DD
DCMI_VSYNC/
EVENTOUT
TIM8_CH1 /
EVENTOUT
EVENTOUT
EVENTOUT
(Regulator OFF), then PA0 is used
NAND 16 bit
STM32F20xxx
LQFP100
functions
Other
Yes
Yes
Yes
Yes
Yes
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