STM32F103VDT6TR STMicroelectronics, STM32F103VDT6TR Datasheet - Page 106
STM32F103VDT6TR
Manufacturer Part Number
STM32F103VDT6TR
Description
ARM Microcontrollers - MCU STM32F103 Perf Line M3 384kB 72 MHz MCU
Manufacturer
STMicroelectronics
Datasheet
1.STM32F103VDT7.pdf
(130 pages)
Specifications of STM32F103VDT6TR
Product Category
ARM Microcontrollers - MCU
Core
ARM Cortex M3
Data Bus Width
32 bit
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Electrical characteristics
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Figure 58. Typical connection diagram using the ADC
1. Refer to
2. C
General PCB design guidelines
Power supply decoupling should be performed as shown in
depending on whether V
ceramic (good quality). They should be placed them as close as possible to the chip.
Figure 59. Power supply and reference decoupling (V
1. V
pad capacitance (roughly 7 pF). A high C
this, f
REF+
parasitic
ADC
V AIN
and V
Table 59
represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the
should be reduced.
R AIN (1)
REF–
1 µF // 10 nF
for the values of R
inputs are available only on 100-pin packages.
C parasitic
AINx
REF+
is connected to V
Doc ID 14611 Rev 8
AIN
V DD
1 µF // 10 nF
, R
parasitic
ADC
0.6 V
0.6 V
V T
V T
and C
value will downgrade conversion accuracy. To remedy
STM32F103xC, STM32F103xD, STM32F103xE
ADC
I L ±1 µA
DDA
.
or not. The 10 nF capacitors should be
V
V
STM32F103xx
V
(see note 1)
R ADC (1)
DDA
SSA
Sample and hold ADC
converter
REF+
/V
(see note 1)
REF+
Figure 59
REF–
C ADC (1)
STM32F103xx
not connected to
converter
12-bit
or
Figure
ai14388b
60,
ai14150c
V
DDA
)
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