74AUP1T97GW,125 NXP Semiconductors, 74AUP1T97GW,125 Datasheet - Page 4

IC LP CONFIG GATE V-XLATR UMT6

74AUP1T97GW,125

Manufacturer Part Number
74AUP1T97GW,125
Description
IC LP CONFIG GATE V-XLATR UMT6
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1T97GW,125

Logic Function
Translator
Number Of Bits
3
Input Type
Voltage
Output Type
Voltage
Number Of Channels
3
Number Of Outputs/channel
1
Differential - Input:output
No/No
Propagation Delay (max)
3.8ns
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Package / Case
SC-70-6, SC-88, SOT-363
Supply Voltage
2.3 V ~ 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Rate
-
Other names
74AUP1T97GW-G
74AUP1T97GW-G
935280468125
NXP Semiconductors
Table 5.
74AUP1T97
Product data sheet
Logic function
2-input MUX
2-input AND
2-input OR with one input inverted
2-input NAND with one input inverted
2-input AND with one input inverted
2-input NOR with one input inverted
2-input OR
Inverter
Buffer
Fig 5.
Fig 7.
Fig 9.
B
A
C
2-input MUX
2-input NAND gate with input A inverted or
2-input OR gate with input C inverted
2-input OR gate
C
C
C
A
A
B
Function selection table
7.1 Logic configurations
Y
Y
Y
Y
A
B
B
A
1
2
3
1
2
3
1
2
3
6
5
4
6
5
4
All information provided in this document is subject to legal disclaimers.
6
5
4
001aae004
001aae006
001aae002
C
Y
C
Y
C
Y
V
V
CC
CC
V
CC
Rev. 2 — 18 October 2010
Low-power configurable gate with voltage-level translator
Figure
see
see
see
see
see
see
see
see
see
Fig 6.
Fig 8.
Fig 10. Inverter
Figure 5
Figure 6
Figure 7
Figure 7
Figure 8
Figure 8
Figure 9
Figure 10
Figure 11
2-input AND gate
2-input NOR gate with input B inverted or
2-input AND gate with input C inverted
C
C
C
A
B
B
C
Y
Y
Y
Y
A
B
1
2
3
74AUP1T97
1
2
3
1
2
3
6
5
4
001aae007
6
5
4
6
5
4
© NXP B.V. 2010. All rights reserved.
001aae003
001aae005
C
Y
V
C
Y
C
Y
CC
V
V
CC
CC
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