ISL3034EIRTZ Intersil, ISL3034EIRTZ Datasheet
![IC LEVEL TRANSLATOR 6CH 16-TQFN](/photos/28/20/282002/16-tqfn_l16_sml.jpg)
ISL3034EIRTZ
Specifications of ISL3034EIRTZ
Related parts for ISL3034EIRTZ
ISL3034EIRTZ Summary of contents
Page 1
... L CC DAT1 I/OV I/OV DAT1 L CC DAT0 I/OV I/OV DAT0 L CC CMD I/OV I/OV CMD L CC CLOCK CLK_V CLK_V CLOCK L CC CLK_RET GND | Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2009. All Rights Reserved +3.3V GND ...
Page 2
... Ordering Information PART NUMBER ISL3034EIRTZ (Note 1) ISL3034EIRTZ-T (Notes 1, 3) ISL3034EIRUZ-T (Notes 2, 3) ISL3035EIRTZ (Note 1) ISL3035EIRTZ-T (Notes 1, 3) ISL3035EIRUZ-T (Notes 2, 3) ISL3036EIRZ-T (Notes 1, 3) ISL3036EIRUZ-T (Notes 2, 3) NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
Page 3
Pinouts (Continued) ISL3035E (16 LD TQFN) TOP VIEW I/ THERMAL PAD I/ I/ ISL3036E (14 LD QFN) TOP VIEW I/ I/OV 2 ...
Page 4
... TQFN Package (Notes 4, 5 0.3V µTQFN Package (Note Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C , Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150°C CC Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp = +1.35V to +3.2V +1.8V and T = +25°C. (Note 6 TEST CONDITIONS (Note 6) (Note 6) I/OV ...
Page 5
Electrical Specifications V = +2.2V to +3.6V +3.3V PARAMETER SYMBOL ESD PROTECTION All Input and I/O Pins From Pin to GND All Pins LOGIC-LEVEL THRESHOLDS I/OV , CLK_V Input Voltage IHL ...
Page 6
Electrical Specifications V = +2.2V to +3.6V +3.3V PARAMETER SYMBOL I/OV , CLK_RET Fall Time t L FVL I/OV , CLK_V Propagation PDVCC Delay (Driving I/OV , CLK_V ) L L ...
Page 7
Test Circuits and Waveforms I/OV CC 150Ω SIGNAL GENERATOR FIGURE 2A. TEST CIRCUIT FIGURE 2. I/OV L SIGNAL EN GENERATOR I/OV I/ GND SW1 PARAMETER SW1 t ...
Page 8
Application Information Overview The ISL3034E, ISL3035E, ISL3036E are 100Mbps, bi-directional voltage level translating ICs for multi-supply voltage systems. These products shift lower voltage levels on one interface side (supplied higher voltage L level on the ...
Page 9
The low static pull-up current is easily overdriven by an active pull-down, and the feedback nature of the accelerators (i.e., the accelerator firing in one direction also triggers the accelerator in the opposite direction) aids the passive pull-up once ...
Page 10
Best-in-Class ESD Protection All pins on these devices include class 3 (>12kV) Human Body Model (HBM) ESD protection structures, but the input and I/O pins incorporate advanced structures allowing them to survive ESD events in excess of ±15kV HBM and ...
Page 11
Typical Performance Curves 1. SWITCHING 6 I/OV INPUTS L 25 SWITCHING 4 I/ SWITCHING 1 I/OV INPUT 2.2 2.4 2.6 2.8 3.0 V SUPPLY VOLTAGE (V) CC FIGURE 9. ...
Page 12
Typical Performance Curves 1.8 SWITCHING I/OV INPUT L 1.7 t FVCC 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0 CAPACITIVE LOAD (pF) FIGURE 15. RISE/FALL TIME vs I/OV CC 4.2 SWITCHING I/OV INPUT L 4.0 3.8 t ...
Page 13
Typical Performance Curves 3.0 2.5 2.0 1.5 1 35pF L 0 15pF L 1.5 1.0 0.5 0 TIME (4ns/DIV) FIGURE 21. ISL3035E CLOCK WAVEFORMS (100Mbps) 13 ISL3034E, ISL3035E, ISL3036E V = ...
Page 14
... Maximum package warpage is 0.05mm. 8. Maximum allowable burrs is 0.076mm in all directions. TERMINAL TIP 9. JEDEC Reference MO-255. 10. For additional information, to assist with the PCB Land Pattern Design effort, see Intersil Technical Brief TB389. 1.40 0.40 0.20 MILLIMETERS MIN NOMINAL ...
Page 15
Package Outline Drawing L14.3.5x3.5 14 LEAD QUAD DUAL FLAT NO-LEAD PLASTIC PACKAGE (QFN) Rev 0, 2/08 3.50 (4X) 0.15 TOP VIEW ( 2. 3.30 TYP ) ( 2.05) TYPICAL RECOMMENDED LAND PATTERN 15 ISL3034E, ISL3035E, ISL3036E A 6 ...
Page 16
... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...