M95040-RMC6TG STMicroelectronics, M95040-RMC6TG Datasheet - Page 17

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M95040-RMC6TG

Manufacturer Part Number
M95040-RMC6TG
Description
EEPROM 4 Kbit SPI BUS EE 10MHz CR 5ms
Manufacturer
STMicroelectronics
Datasheet

Specifications of M95040-RMC6TG

Product Category
EEPROM
Rohs
yes
M950x0 M950x0-W M950x0-R
6.2
Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in
Chip Select (S) is driven low, and the bits of the instruction byte are shifted in, on Serial Data
Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S) being driven high.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
Figure 8.
Power-up
WRDI instruction execution
WRSR instruction completion
WRITE instruction completion
Write Protect (W) line being held low.
Figure 8: Write Disable (WRDI)
Write Disable (WRDI) sequence
S
C
D
Q
Doc ID 6512 Rev 10
High Impedance
0
1
2
Instruction
sequence, to send this instruction to the device,
3
4
5
6
7
AI03790D
Instructions
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