AT24C256N-10SU Atmel, AT24C256N-10SU Datasheet

Page 1

... Description The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device’s cascadable feature allows devices to share a common Two-wire bus. The device is optimized for use in many industrial and commercial appli- cations where low power and low voltage operation are essential ...

Page 2

Absolute Maximum Ratings* Operating Temperature.................................–55° +125° C Storage Temperature ....................................–65° +150° C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 1. ...

Page 3

... AT24C128/256, 128K/256K SERIAL EEPROM: The 128K/256K is internally organized as 256/512 pages of 64-bytes each. Random word addressing requires a 14/15-bit data word Organization address. 0670T–SEEPR–3/07 plane is <3 pF. If coupling is >3 pF, Atmel recommends con all write operations to the memory are inhib- CC plane is <3 pF. If coupling is >3 pF, Atmel recommends con- CC AT24C128/256 3 ...

Page 4

Table 2. Pin Capacitance Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance ( Note: 1. This parameter is characterized and is not 100% tested. (1) ...

Page 5

Table 4. AC Characteristics – Industrial Temperatures Applicable over recommended operating range from T erwise noted). Test conditions are listed in Note 2. Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width ...

Page 6

Table 5. AC Characteristics – Extended Temperatures Applicable over recommended operating range from T otherwise noted). Test conditions are listed in Note 2. Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse ...

Page 7

... ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl- edge that it has received each word. STANDBY MODE: The AT24C128/256 features a low power standby mode which is enabled: a) upon power-up and b) after the receipt of the STOP bit and the completion of any internal operations ...

Page 8

Figure 2. Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O Figure 3. Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORDn Note: 1. The write cycle time t is the time from a ...

Page 9

Figure 4. Data Validity Figure 5. Start and Stop Definition Figure 6. Output Acknowledge 0670T–SEEPR–3/07 AT24C128/256 9 ...

Page 10

... The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a zero compare is not made, the device will return to a standby state. ...

Page 11

... SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a ran- dom address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will “ ...

Page 12

Figure 9. Page Write Notes: Figure 10. Current Address Read Figure 11. Random Read Notes: Figure 12. Sequential Read AT24C128/256 DON’T CARE bit) († = DON’T CARE bit for the 128K DON’T CARE bit) († ...

Page 13

... AC and DC characteristics tables. 2. “U” designates Green package + RoHS compliant. 3. Available in waffle pack and wafer form; order as SL788 for wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing. 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" ...

Page 14

... AT24C256 Ordering Information Ordering Code (2) AT24C256-10PU-2.7 (2) AT24C256-10PU-1.8 (2) AT24C256N-10SU-2.7 (2) AT24C256N-10SU-1.8 (2) AT24C256W-10SU-2.7 (2) AT24C256W-10SU-1.8 (2) AT24C256-10TU-2.7 (2) AT24C256-10TU-1.8 (2) AT24C256U2-10UU-1.8 (2) AT24C256Y1-10YU-1.8 (2) AT24C256Y4-10YU-1.8 (3) AT24C256-W1.8-11 Notes: 1. This device is not recommended for new design. Please refer to AT24C256B datasheet. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. ...

Page 15

Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...

Page 16

JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R ...

Page 17

EIAJ SOIC 1 N Top View e D Side View Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs ...

Page 18

A1 BALL PAD CORNER e (e1) 1. This drawing is for general information only. 2. Dimension ‘b’ is measured at the maximum solder ball diameter. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C128/256 18 ...

Page 19

MAP D E Top View Side View 2325 Orchard Parkway San Jose, CA 95131 R 0670T–SEEPR–3/ End View A SYMBOL TITLE 8Y1, 8-lead (4.90 x 3.00 mm ...

Page 20

SAP PIN 1 INDEX AREA D E 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 0670T–SEEPR–3/07 A PIN COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A – A1 0.00 ...

Page 21

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 22

Revision History AT24C128/256 22 Doc. Rev. Date Comments 0670T 3/2007 Added note ‘Not recommended for new design’ to AT24C128 0670S 5/2006 Implemented Revision History page; Added Note 1 “Not recommended for new design; please refer to AT24C256B datasheet” to AT24C256 ...

Page 23

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...