AT24C256N-10SI-2.7 Atmel, AT24C256N-10SI-2.7 Datasheet

IC EEPROM 256KBIT 1MHZ 8SOIC

AT24C256N-10SI-2.7

Manufacturer Part Number
AT24C256N-10SI-2.7
Description
IC EEPROM 256KBIT 1MHZ 8SOIC
Manufacturer
Atmel
Datasheet

Specifications of AT24C256N-10SI-2.7

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
256K (32K x 8)
Speed
400kHz, 1MHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
AT24C256N-10SI2.7
AT24C256N10SI2.7

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT24C256N-10SI-2.7
Manufacturer:
ATMEL
Quantity:
8 000
Part Number:
AT24C256N-10SI-2.7
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Features
Description
The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and
programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8
bits each. The device’s cascadable feature allows up to 4 devices to share a common
Two-wire bus. The device is optimized for use in many industrial and commercial appli-
cations where low power and low voltage operation are essential. The devices are
available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ
SOIC, 8-lead MAP (24C128), 8-lead TSSOP, 8-lead SOIC Array Package and 8-ball
dBGA2 packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and
1.8V (1.8V to 3.6V) versions.
Table 1. Pin Configuration
Pin Name
A0 - A1
SDA
SCL
WP
NC
GND
Low-voltage and Standard-voltage Operation
Internally Organized 16,384 x 8 and 32,768 x 8
Two-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V), 400 kHz (2.7V, 2.5V) and 100 kHz (1.8V) Compatibility
Write Protect Pin for Hardware and Software Data Protection
64-byte Page Write Mode (Partial Page Writes Allowed)
Self-timed Write Cycle (5 ms Max)
High Reliability
Extended Temperature and Lead-free/Halogen-free
Devices Available
8-lead JEDEC PDIP, 8-lead JEDEC and EIAJ SOIC, 8-lead MAP, 8-lead TSSOP, 8-lead
SAP and 8-ball dBGA2 Packages
Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
– 2.7 (V
– 1.8 (V
– Endurance: One Million Write Cycles
– Data Retention: 40 Years
CC
CC
= 2.7V to 5.5V)
= 1.8V to 3.6V)
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No Connect
Ground
GND
GND
NC
NC
A0
A1
A0
A1
VCC
SDA
SCL
WP
8-ball dBGA2
Bottom View
8-lead PDIP
8-lead SOIC
1
2
3
4
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
A0
A1
NC
GND
8
7
6
5
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
VCC
SDA
SCL
VCC
SDA
SCL
GND
WP
WP
NC
A0
A1
8-lead TSSOP
Bottom View
Bottom View
8-lead MAP
8
7
6
5
8-lead SAP
8
7
6
5
1
2
3
4
1
2
3
4
1
2
3
4
8
7
6
5
A0
A1
NC
GND
A0
A1
NC
GND
VCC
WP
SCL
SDA
Notes:
Two-wire Serial
EEPROMs
128K (16,384 x 8)
256K (32,768 x 8)
AT24C128
AT24C256
1. Not recommended for
2. Not recommended for
new design; please
refer to AT24C128B
datasheet.
new design; please
refer to AT24C256B
datasheet.
0670T–SEEPR–3/07
(1)
(2)
1

Related parts for AT24C256N-10SI-2.7

AT24C256N-10SI-2.7 Summary of contents

Page 1

... Description The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device’s cascadable feature allows devices to share a common Two-wire bus. The device is optimized for use in many industrial and commercial appli- cations where low power and low voltage operation are essential ...

Page 2

Absolute Maximum Ratings* Operating Temperature.................................–55° +125° C Storage Temperature ....................................–65° +150° C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 1. ...

Page 3

... AT24C128/256, 128K/256K SERIAL EEPROM: The 128K/256K is internally organized as 256/512 pages of 64-bytes each. Random word addressing requires a 14/15-bit data word Organization address. 0670T–SEEPR–3/07 plane is <3 pF. If coupling is >3 pF, Atmel recommends con all write operations to the memory are inhib- CC plane is <3 pF. If coupling is >3 pF, Atmel recommends con- CC AT24C128/256 3 ...

Page 4

Table 2. Pin Capacitance Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance ( Note: 1. This parameter is characterized and is not 100% tested. (1) ...

Page 5

Table 4. AC Characteristics – Industrial Temperatures Applicable over recommended operating range from T erwise noted). Test conditions are listed in Note 2. Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width ...

Page 6

Table 5. AC Characteristics – Extended Temperatures Applicable over recommended operating range from T otherwise noted). Test conditions are listed in Note 2. Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse ...

Page 7

... STOP bit and the completion of any internal operations. MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-wire part can be reset by following these steps: (a) Clock cycles, (b) look for SDA high in each cycle while SCL is high and then (c) create a start condition as SDA is high. ...

Page 8

Figure 2. Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O Figure 3. Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORDn Note: 1. The write cycle time t is the time from a ...

Page 9

Figure 4. Data Validity Figure 5. Start and Stop Definition Figure 6. Output Acknowledge 0670T–SEEPR–3/07 AT24C128/256 9 ...

Page 10

... The data word address lower 6 bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than 64 data words are transmitted to the EEPROM, the data word address will “ ...

Page 11

... This address stays valid between operations as long as the chip power is maintained. The address “roll over” during read is from the last byte of the last memory page, to the first byte of the first page. ...

Page 12

Figure 9. Page Write Notes: Figure 10. Current Address Read Figure 11. Random Read Notes: Figure 12. Sequential Read AT24C128/256 DON’T CARE bit) († = DON’T CARE bit for the 128K DON’T CARE bit) († ...

Page 13

AT24C128 Ordering Information Ordering Code (2) AT24C128-10PU-2.7 (2) AT24C128-10PU-1.8 (2) AT24C128N-10SU-2.7 (2) AT24C128N-10SU-1.8 (2) AT24C128W-10SU-2.7 (2) AT24C128W-10SU-1.8 (2) AT24C128-10TU-2.7 (2) AT24C128-10TU-1.8 (2) AT24C128U2-10UU-1.8 (2) AT24C128Y1-10YU-1.8 (2) AT24C128Y4-10YU-1.8 (3) AT24C128-W1.8-11 Notes: 1. This device is not recommended for new design. Please ...

Page 14

... AT24C256 Ordering Information Ordering Code (2) AT24C256-10PU-2.7 (2) AT24C256-10PU-1.8 (2) AT24C256N-10SU-2.7 (2) AT24C256N-10SU-1.8 (2) AT24C256W-10SU-2.7 (2) AT24C256W-10SU-1.8 (2) AT24C256-10TU-2.7 (2) AT24C256-10TU-1.8 (2) AT24C256U2-10UU-1.8 (2) AT24C256Y1-10YU-1.8 (2) AT24C256Y4-10YU-1.8 (3) AT24C256-W1.8-11 Notes: 1. This device is not recommended for new design. Please refer to AT24C256B datasheet. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. ...

Page 15

Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...

Page 16

JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R ...

Page 17

EIAJ SOIC 1 N Top View e D Side View Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs ...

Page 18

A1 BALL PAD CORNER e (e1) 1. This drawing is for general information only. 2. Dimension ‘b’ is measured at the maximum solder ball diameter. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R AT24C128/256 18 ...

Page 19

MAP D E Top View Side View 2325 Orchard Parkway San Jose, CA 95131 R 0670T–SEEPR–3/ End View A SYMBOL TITLE 8Y1, 8-lead (4.90 x 3.00 mm ...

Page 20

SAP PIN 1 INDEX AREA D E 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 0670T–SEEPR–3/07 A PIN COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A – A1 0.00 ...

Page 21

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 22

Revision History AT24C128/256 22 Doc. Rev. Date Comments 0670T 3/2007 Added note ‘Not recommended for new design’ to AT24C128 0670S 5/2006 Implemented Revision History page; Added Note 1 “Not recommended for new design; please refer to AT24C256B datasheet” to AT24C256 ...

Page 23

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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