LFE3-35EA-7LFN672C Lattice, LFE3-35EA-7LFN672C Datasheet - Page 86
LFE3-35EA-7LFN672C
Manufacturer Part Number
LFE3-35EA-7LFN672C
Description
FPGA - Field Programmable Gate Array 33.3K LUTs 310 I/O 1.2V -7 SPEED
Manufacturer
Lattice
Datasheet
1.LFE3-95EA-7LFN672I.pdf
(141 pages)
Specifications of LFE3-35EA-7LFN672C
Rohs
yes
Number Of Gates
33 K
Number Of Logic Blocks
72
Embedded Block Ram - Ebr
1327 Kbit
Number Of I/os
310
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
FPBGA-672
Distributed Ram
68 Kbit
Minimum Operating Temperature
0 C
Operating Supply Current
53.7 mA
Factory Pack Quantity
40
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE3-35EA-7LFN672C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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DC and Switching Characteristics
LatticeECP3 Family Data Sheet
1, 2, 3, 4, 5, 6
LatticeECP3 Maximum I/O Buffer Speed (Continued)
Over Recommended Operating Conditions
Buffer
Description
Max.
Units
PCI33
PCI, V
= 3.3V
66
MHz
CCIO
1. These maximum speeds are characterized but not tested on every device.
2. Maximum I/O speed for differential output standards emulated with resistors depends on the layout.
3. LVCMOS timing is measured with the load specified in the Switching Test Conditions table of this document.
4. All speeds are measured at fast slew.
5. Actual system operation may vary depending on user logic implementation.
6. Maximum data rate equals 2 times the clock rate when utilizing DDR.
3-33
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