5CSEBA5U23C8N Altera Corporation, 5CSEBA5U23C8N Datasheet - Page 18

• Manufacturer Part Number: 5CSEBA5U23C8N
• Description: FPGA - Field Programmable Gate Array FPGA - Cyclone V SE SOC 3207 LABs 145 IO
• Manufacturer: Altera Corporation
• Series: Cyclone V SoC SEr

Specifications of 5CSEBA5U23C8N

• Rohs: yes
• Number Of Logic Blocks: 3207
• Embedded Block Ram - Ebr: 480 kbit
• Number Of I/os: 145
• Maximum Operating Frequency: 800 MHz
• Operating Supply Voltage: 1.8 V, 2.5 V, 3 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: UBGA-672
• Distributed Ram: 3970 kbit
• Minimum Operating Temperature: 0 C

Altera Corporation
18
Embedded Memory Configurations
Clock Networks and PLL Clock Sources
Table 19: Supported Embedded Memory Block Configurations for Cyclone V Devices
PLL Features
Cyclone V SX
Cyclone V ST
Cyclone V devices have 16 global clock networks capable of up to 550 MHz operation. The clock network
architecture is based on Altera's global, quadrant, and peripheral clock structure. This clock structure is
supported by dedicated clock input pins and fractional PLLs.
Note:
The PLLs in the Cyclone V devices support the following features:
Cyclone V Device Overview
Variant
Frequency synthesis
On-chip clock deskew
Jitter attenuation
Counter reconfiguration
Programmable output clock duty cycles
PLL cascading
Reference clock switchover
Programmable bandwidth
User-mode reconfiguration of PLLs
Memory Block
To reduce power consumption, the Quartus II software identifies all unused sections of the clock
network and powers them down.
MLAB
M10K
Member
Code
C4
C5
C6
D5
D6
C2
Block
140
224
397
514
397
514
M10K
RAM Bit (Kb)
Depth (bits)
1,400
2,240
3,970
5,140
3,970
5,140
512
256
1K
2K
4K
8K
32
Block
221
352
768
994
768
994
MLAB
RAM Bit (Kb)
Programmable Width
x16, x18, or x20
138
220
480
621
480
621
Cyclone V Device Overview
x40 or x32
x20 or x16
x10 or x8
x5 or x4
x2
x1
Total RAM Bit
1,538
2,460
4,450
5,761
4,450
5,761
(Kb)
2012.12.28
CV-51001