5CGTFD5C5U19I7N Altera Corporation, 5CGTFD5C5U19I7N Datasheet - Page 8

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5CGTFD5C5U19I7N

Manufacturer Part Number
5CGTFD5C5U19I7N
Description
FPGA - Field Programmable Gate Array FPGA - Cyclone V GT 2908 LABs 224 IOs
Manufacturer
Altera Corporation
Series
Cyclone V GTr
Datasheet

Specifications of 5CGTFD5C5U19I7N

Rohs
yes
Number Of Logic Blocks
2908
Embedded Block Ram - Ebr
4884 kbit
Number Of I/os
224
Maximum Operating Frequency
800 MHz
Operating Supply Voltage
1.1 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
BGA-484
Distributed Ram
424 kbit
Minimum Operating Temperature
- 40 C

Available stocks

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Quantity
Price
Part Number:
5CGTFD5C5U19I7N
Manufacturer:
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Altera Corporation
8
Package Plan
Cyclone V SE
10
6
7
8
9
Table 9: Package Plan for Cyclone V GT Devices Preliminary
ALM
Register
Memory (Kb)
Variable-precision DSP Block
18 x 18 Multiplier
PLL
5 Gbps Transceiver
GPIO
LVDS
PCIe Hard IP Block
Hard Memory Controller
Mem-
Code
The number of PLLs includes general-purpose fractional PLLs and transceiver fractional PLLs.
The number of GPIOs does not include transceiver I/Os. In the Quartus II software, the number of user I/Os
includes transceiver I/Os.
For the number of LVDS channels in each package, refer to the
If you require CPRI (at 4.9152 Gbps) and PCIe Gen2 transmit jitter compliance, Altera recommends that you
use only up to seven full-duplex transceiver channels for CPRI, and up to six full-duplex channels for PCIe
Gen2. The CMU channels are not considered full-duplex channels.
If you require CPRI (at 4.9152 Gbps) and PCIe Gen2 transmit jitter compliance, Altera recommends that you
use only up to 10 full-duplex transceiver channels for CPRI, and up to eight full-duplex channels for PCIe
Gen2. The CMU channels are not considered full-duplex channels.
ber
D5
D7
D9
This section provides the available options, maximum resource counts, and package plan for the Cyclone V SE
devices.
Cyclone V Device Overview
6
7
8
GPIO
127
(11 mm)
M301
XCVR
4
Resource
GPIO
175
(13 mm)
M386
XCVR
6
MLAB
M10K
GPIO
240
(15 mm)
M484
XCVR
3
GPIO
224
240
240
(19 mm)
U484
116,320
29,080
4,460
XCVR
424
150
300
336
D5
84
6
6
2
2
6
6
5
GPIO
240
240
224
(23 mm)
F484
I/O Features in Cyclone V Devices
XCVR
6
6
6
Member Code
GPIO
336
336
336
225,920
56,480
(27 mm)
6,860
836
156
312
480
120
F672
D7
7
9
2
2
XCVR
9
9
6
9
9
GPIO
Cyclone V Device Overview
480
480
(31 mm)
F896
XCVR
12
9
9
10
113,560
454,240
12,200
1,717
342
684
560
140
D9
12
GPIO
chapter.
8
2
2
560
(35 mm)
F1152
2012.12.28
XCVR
CV-51001
12
10

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