LCMXO2-256ZE-1SG32I Lattice, LCMXO2-256ZE-1SG32I Datasheet - Page 78

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LCMXO2-256ZE-1SG32I

Manufacturer Part Number
LCMXO2-256ZE-1SG32I
Description
FPGA - Field Programmable Gate Array 256 LUTs 22 I/O 1.2V -1 Speed
Manufacturer
Lattice
Datasheet

Specifications of LCMXO2-256ZE-1SG32I

Rohs
yes
Number Of Gates
256
Embedded Block Ram - Ebr
0 Kbit
Number Of I/os
22
Maximum Operating Frequency
104 MHz
Operating Supply Voltage
1.14 V to 1.26 V
Maximum Operating Temperature
+ 100 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Distributed Ram
2 Kbit
Operating Supply Current
18 uA
Factory Pack Quantity
490
General Purpose
DONE
MCLK/CCLK
SN
CSSPIN
SI/SISPI
SO/SPISO
SCL
SDA
Signal Name
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
Open Drain pin. Indicates that the configuration sequence is complete, and the start-up
sequence is in progress.
Input Configuration Clock for configuring an FPGA in Slave SPI mode. Output Configuration
Clock for configuring an FPGA in SPI and SPIm configuration modes.
Slave SPI active low chip select input.
Master SPI active low chip select output.
Slave SPI serial data input and master SPI serial data output.
Slave SPI serial data output and master SPI serial data input.
Slave I
Slave I
2
2
C clock input and master I
C data input and master I
4-2
2
2
C data output.
C clock output.
Descriptions
MachXO2 Family Data Sheet
Pinout Information

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