PCI-MT32-O4-N2 Lattice, PCI-MT32-O4-N2 Datasheet - Page 126
PCI-MT32-O4-N2
Manufacturer Part Number
PCI-MT32-O4-N2
Description
FPGA - Field Programmable Gate Array PCI Master/Target 32B
Manufacturer
Lattice
Datasheet
1.PCI-MT32-O4-N2.pdf
(193 pages)
Specifications of PCI-MT32-O4-N2
Factory Pack Quantity
1
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Lattice Semiconductor
IPUG18_09.2, November 2010
Figure 2-45
Figure 2-45. 32-bit Target Disconnect with Data for Write Transaction
Table 2-50. 32-bit Target Disconnect with Data for Read Transaction (Continued)
CLK
8
9
l_data_out[31:0]
lt_disconnectn
lt_addressout
lt_data_xfern
bar_hit[5:0]
cben[3:0]
ad[31:0]
devseln
lt_r_nw
framen
lt_rdyn
and
stopn
trdyn
irdyn
De-asserting irdyn disconnects the PCI master. De-asserting devseln and stopn. Disconnects the PCI IP
core from the PCI bus.
The larger relinquishes devseln, stopn and trdyn.
par
clk
Table 2-51
1
Don’t care
Command
Address
Bus
0x00
illustrate a Disconnect With Data on a write transaction.
2
Address
Parity
3
Don’t care
Byte Enable 1
4
Data 1
Data Parity 1
5
126
Description
0x01
6
Address
Don’t care
Don’t care
Data 1
7
Don’t care
8
Functional Description
Don’t care
PCI IP Core User’s Guide
9
0x00
10
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