5CSEBA6U23C7SN Altera Corporation, 5CSEBA6U23C7SN Datasheet - Page 11

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5CSEBA6U23C7SN

Manufacturer Part Number
5CSEBA6U23C7SN
Description
FPGA - Field Programmable Gate Array FPGA - Cyclone V SE SOC 4150 LABs 145 IO
Manufacturer
Altera Corporation
Series
Cyclone V SoC SEr
Datasheet

Specifications of 5CSEBA6U23C7SN

Rohs
yes
Number Of Logic Blocks
4150
Embedded Block Ram - Ebr
621 kbit
Number Of I/os
145
Maximum Operating Frequency
800 MHz
Operating Supply Voltage
1.8 V, 2.5 V, 3 V, 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
UBGA-672
Distributed Ram
5140 kbit
Minimum Operating Temperature
0 C

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CV-51001
2012.12.28
Cyclone V Device Overview
Maximum Resources
Package Plan
14
15
16
Table 12: Maximum Resource Counts for Cyclone V SX Devices Preliminary
Table 13: Package Plan for Cyclone V SX Devices Preliminary
Logic Elements (LE) (K)
ALM
Register
Memory (Kb)
Variable-precision DSP Block
18 x 18 Multiplier
FPGA PLL
HPS PLL
3 Gbps Transceiver
FPGA GPIO
HPS I/O
LVDS
PCIe Hard IP Block
FPGA Hard Memory Controller
HPS Hard Memory Controller
ARM Cortex-A9 MPCore Processor
Member Code
The number of PLLs includes general-purpose fractional PLLs and transceiver fractional PLLs.
The number of GPIOs does not include transceiver I/Os. In the Quartus II software, the number of user I/Os
includes transceiver I/Os.
For the number of LVDS channels in each package, refer to the
C2
C4
C5
C6
16
14
15
Resource
FPGA GPIO
145
145
145
145
MLAB
M10K
HPS I/O
(23 mm)
188
188
188
188
U672
Dual-core
37,736
9,434
1,400
138
145
188
C2
25
36
72
31
4
3
6
2
1
1
XCVR
6
6
9
9
Dual-core
15,094
60,376
2,240
220
116
145
188
C4
40
58
31
5
3
6
2
1
1
I/O Features in Cyclone V Devices
FPGA GPIO
Member Code
288
288
Cyclone V Device Overview
Dual-core
128,300
32,075
3,970
480
174
288
188
C5
85
87
72
HPS I/O
6
3
9
2
1
1
(31 mm)
188
188
F896
Altera Corporation
Dual-core
166,036
41,509
5,140
chapter.
XCVR
110
621
112
224
288
188
C6
72
6
3
9
2
1
1
9
9
11

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