5CSEBA6U23C7SN Altera Corporation, 5CSEBA6U23C7SN Datasheet - Page 13

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5CSEBA6U23C7SN

Manufacturer Part Number
5CSEBA6U23C7SN
Description
FPGA - Field Programmable Gate Array FPGA - Cyclone V SE SOC 4150 LABs 145 IO
Manufacturer
Altera Corporation
Series
Cyclone V SoC SEr
Datasheet

Specifications of 5CSEBA6U23C7SN

Rohs
yes
Number Of Logic Blocks
4150
Embedded Block Ram - Ebr
621 kbit
Number Of I/os
145
Maximum Operating Frequency
800 MHz
Operating Supply Voltage
1.8 V, 2.5 V, 3 V, 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
UBGA-672
Distributed Ram
5140 kbit
Minimum Operating Temperature
0 C

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CV-51001
2012.12.28
Cyclone V Device Overview
Package Plan
19
20
Table 15: Package Plan for Cyclone V ST Devices Preliminary
LVDS
PCIe Hard IP Block
FPGA Hard Memory Controller
HPS Hard Memory Controller
ARM Cortex-A9 MPCore Processor
For the number of LVDS channels in each package, refer to the
IIf you require CPRI (at 4.9152 Gbps) and PCIe Gen2 transmit jitter compliance, Altera recommends that you
use only up to seven full-duplex transceiver channels for CPRI, and up to six full-duplex channels for PCIe
Gen2. The CMU channels are not considered full-duplex channels.
Member Code
19
D5
D6
Resource
FPGA GPIO
288
288
HPS I/O
188
188
Dual-core
(31 mm)
I/O Features in Cyclone V Devices
F896
D5
72
2
1
1
Cyclone V Device Overview
Member Code
Dual-core
XCVR
9
9
20
20
Altera Corporation
D6
72
2
1
1
chapter.
13

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