1893CY-10LFT IDT, 1893CY-10LFT Datasheet - Page 100
1893CY-10LFT
Manufacturer Part Number
1893CY-10LFT
Description
Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
Manufacturer
IDT
Datasheet
1.1893CFLF.pdf
(121 pages)
Specifications of 1893CY-10LFT
Rohs
yes
Part # Aliases
ICS1893CY-10LFT
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9.5.2 Timing for Transmit Clock (TXCLK) Pins
ICS1893CK-40, Rev. C, 06/02/09
TXCLK
Table 9-9
interfaces.
Table 9-9. Transmit Clock Timing
Figure 9-3. Transmit Clock Timing Diagram
Period
Time
t2a
t2b
t1
lists the significant time periods for signals on the Transmit Clock (TXCLK) pins for the various
ICS1893CK-40 Data Sheet - Release
TXCLK Duty Cycle
TXCLK Period
TXCLK Period
Figure 9-3
Parameter
shows the timing diagram for the time periods.
Copyright © 2009, Integrated Device Technology, Inc.
100M MII (100Base-TX)
10M MII (10Base-T)
All rights reserved.
t1
100
Conditions
t2x
–
Chapter 9 DC and AC Operating Conditions
Min.
35
–
–
Typ. Max. Units
400
50
40
65
–
–
June 2009
ns
ns
%
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