KSZ8851-16MLLU Micrel, KSZ8851-16MLLU Datasheet - Page 50

• Manufacturer Part Number: KSZ8851-16MLLU
• Description: Ethernet ICs Single-Port Ethernet Controller (Automotive Grade)
• Manufacturer: Micrel

Specifications of KSZ8851-16MLLU

• Rohs: yes
• Product: Ethernet Controllers
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT

Wakeup Frame 3 Byte Mask 0 Register (0x64 – 0x65): WF3BM0
This register contains the first 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the first byte
of the Wake up frame 3, setting bit 15 selects the 16th byte of the Wake up frame 3.
Wakeup Frame 3 Byte Mask 1 Register (0x66 – 0x67): WF3BM1
This register contains the next 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 17th byte
of the Wake up frame 3. Setting bit 15 selects the 32nd byte of the Wake up frame 3.
Wakeup Frame 3 Byte Mask 2 Register (0x68 – 0x69): WF3BM2
This register contains the next 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 33rd byte
of the Wake up frame 3. Setting bit 15 selects the 48th byte of the Wake up frame 3.
Wakeup Frame 3 Byte Mask 3 Register (0x6A – 0x6B): WF3BM3
This register contains the last 16 bytes mask values of the Wake up frame 3 pattern. Setting bit 0 selects the 49th byte
of the Wake up frame 3. Setting bit 15 selects the 64th byte of the Wake up frame 3.
0x6C – 0x6F: Reserved
Transmit Control Register (0x70 – 0x71): TXCR
This register holds control information programmed by the CPU to control the QMU transmit module function.
May 2012
Micrel, Inc.
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-0
Bit
15-9
8
7
6
5
Default Value
Default Value
Default Value
Default Value
Default Value
0x0
0x0
0x0
0x0
0
0
0
0
-
R/W
R/W
R/W
R/W
R/W
RW
RW
RW
RW
RW
RW
RW
RW
RO
3 pattern.
Description
WF3BM0
Wake up Frame 3 Byte Mask 0. The first 16 byte mask of a Wake up frame 3 pattern.
Description
WF3BM1
Wake up Frame 3 Byte Mask 1. The next 16 bytes mask covering bytes 17 to 32 of a
Wake up frame 3 pattern.
Description
WF3BM2
Wake up Frame 3 Byte Mask 2. The next 16 bytes mask covering bytes 33 to 48 of a
Wake up frame 3 pattern.
Description
WF3BM3
Wake up Frame 3 Byte Mask 3. The last 16 bytes mask covering bytes 49 to 64 of a
Wake up frame 3 pattern.
Description
Reserved.
TCGICMP Transmit Checksum Generation for ICMP
When this bit is set, The KSZ8851-16MLL is enabled to transmit ICMP frame (only for
non-fragment frame) checksum generation.
TCGUDP Transmit Checksum Generation for UDP
When this bit is set, The KSZ8851-16MLL is enabled to transmit UDP frame checksum
generation..
TCGTCP Transmit Checksum Generation for TCP
When this bit is set, The KSZ8851-16MLL is enabled to transmit TCP frame checksum
generation.
TCGIP Transmit Checksum Generation for IP
When this bit is set, The KSZ8851-16MLL is enabled to transmit IP header checksum
generation.
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KSZ8851-16MLL/MLLI
M9999-050112-2.1