AT45DB021D-SU Atmel, AT45DB021D-SU Datasheet - Page 17

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AT45DB021D-SU

Manufacturer Part Number
AT45DB021D-SU
Description
Flash 2M SERIAL 2.7V - IND TEMP
Manufacturer
Atmel
Datasheet

Specifications of AT45DB021D-SU

Product Category
Flash
Rohs
yes
Memory Size
2 Mbit
Architecture
Sectored
Interface Type
SPI
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
15 mA
Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC
Organization
32 KB x 8
Factory Pack Quantity
95

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3638J–DFLASH–5/10
8.2
8.2.1
Security Register
The device contains a specialized Security Register that can be used for purposes such as unique device
serialization or locked key storage. The register is comprised of a total of 128-bytes that is divided into two
portions. The first 64-bytes (byte locations 0 through 63) of the Security Register are allocated as a one-time user
programmable space. Once these 64-bytes have been programmed, they cannot be reprogrammed. The
remaining 64-bytes of the register (byte locations 64 through 127) are factory programmed by Atmel
contain a unique value for each device. The factory programmed data is fixed and cannot be changed.
Table 8-5.
Programming the Security Register
The user programmable portion of the Security Register does not need to be erased before it is programmed.
To program the Security Register, the CS pin must first be asserted and the appropriate 4-byte opcode sequence
must be clocked into the device in the correct order. The 4-byte opcode sequence must start with 9BH and be
followed by 00H, 00H, and 00H. After the last bit of the opcode sequence has been clocked into the device, the
data for the contents of the 64-byte user programmable portion of the Security Register must be clocked in.
After the last data byte has been clocked in, the CS pin must be deasserted to initiate the internally self-timed
program cycle. The programming of the Security Register should take place in a time of t
Status Register will indicate that the device is busy. If the device is powered-down during the program cycle, then
the contents of the 64-byte user programmable portion of the Security Register cannot be guaranteed.
If the full 64-bytes of data is not clocked in before the CS pin is deasserted, then the values of the byte locations
not clocked in cannot be guaranteed. For example, if only the first two bytes are clocked in instead of the complete
64 bytes, then the remaining 62-bytes of the user programmable portion of the Security Register cannot be
guaranteed. Furthermore, if more than 64-bytes of data is clocked into the device, then the data will wrap back
around to the beginning of the register. For instance, if 65-bytes of data are clocked in, then the 65th byte will be
stored at byte location 0 of the Security Register.
The user programmable portion of the Security Register can only be programmed one time. Therefore, it is
not possible to only program the first two bytes of the register and then program the remaining 62-bytes at a later
time.
The Program Security Register command utilizes the internal SRAM buffer for processing. Therefore, the contents
of the buffer will be altered from its previous state when this command is issued.
Figure 8-3.
Data Type
CS
SI
Each transition
represents 8 bits
Security Register
Program Security Register
Opcode
Byte 1
0
One-time User Programmable
Opcode
Byte 2
1
· · ·
Opcode
Byte 3
Security Register Byte Number
62
Opcode
Byte 4
63
64
Data Byte
Factory Programmed By Atmel
n
65
Data Byte
n + 1
· · ·
Atmel AT45DB021D
126
P
Data Byte
127
, during which time the
n + x
®
and will
17

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