MAX9273GTL+ Maxim Integrated, MAX9273GTL+ Datasheet - Page 29

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MAX9273GTL+

Manufacturer Part Number
MAX9273GTL+
Description
Serializers & Deserializers - Serdes 1.5Gbps 22-bit Coax/STP serializer
Manufacturer
Maxim Integrated
Type
Serializerr
Datasheet

Specifications of MAX9273GTL+

Rohs
yes
Data Rate
1.5 Gbit/s
Input Type
CMOS/LVCMOS
Output Type
CML
Number Of Inputs
22
Number Of Outputs
1
Operating Supply Voltage
1.7 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Package / Case
TQFN-40 EP
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
because the slave device is the recipient. When the slave
device is transmitting to the master, the master generates
the acknowledge bit because the master is the recipient.
The device generates an acknowledge even when the
forward control channel is not active (not locked). To pre-
vent acknowledge generation when the forward control
channel is not active, set the I2CLOCACK bit low.
The serializer/deserializer have a 7-bit-long slave address.
The bit following a 7-bit slave address is the R/W bit,
which is low for a write command and high for a read
command. The slave address is 10000001 for read com-
mands and 10000000 for write commands. See
Figure 27. Slave Address
Figure 28. Format for I
Figure 29. Format for Write to Multiple Registers
Maxim Integrated
S
S = START BIT
P = STOP BIT
A = ACK
D_ = DATA BIT
SDA
SCL
1
S
0
D7
1
MSB
0
1
ADDRESS = 0x80
2
D6
0
C Write
0
REGISTER 0x00 WRITE DATA
D5
0
0
ADDRESS = 0x80
0
0
D4
0
0
0 = WRITE
D3
0
22-Bit GMSL Serializer with Coax or
0
D2
0
0
A
Slave Address
D1
0
0 = WRITE
0
D0
0
Figure
0
0
REGISTER ADDRESS = 0x00
A
A
0
27.
0
D7
0
0
0
D6
0
The device resets the bus with the I
for reads. When the R/W bit is set to 1, the serializer/
deserializer transmit data to the master, thus the master
is reading from the device.
A write to the serializer/deserializer comprises the trans-
mission of the slave address with the R/W bit set to zero,
followed by at least one byte of information. The first
byte of information is the register address or command
byte. The register address determines which register of
the device is to be written by the next byte, if received.
If a STOP (P) condition is detected after the register
address is received, the device takes no further action
0
REGISTER 0x01 WRITE DATA
REGISTER ADDRESS = 0x00
D5
0
0
0
D4
0
0
A
D3
0
D7
D2
0
0
STP Cable Drive
D6
D1
REGISTER 0x00 WRITE DATA
0
D5
D0
0
D4
R/W
LSB
A
N
D3
D2
MAX9273
P
2
Format for Writing
C START condition
ACK
D1
S = START BIT
P = STOP BIT
A = ACK
N = NACK
D_ = DATA BIT
D0
Bus Reset
A
P
29

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