MAX9273GTL+ Maxim Integrated, MAX9273GTL+ Datasheet - Page 38

• Manufacturer Part Number: MAX9273GTL+
• Description: Serializers & Deserializers - Serdes 1.5Gbps 22-bit Coax/STP serializer
• Manufacturer: Maxim Integrated
• Type: Serializerr

Specifications of MAX9273GTL+

• Rohs: yes
• Data Rate: 1.5 Gbit/s
• Input Type: CMOS/LVCMOS
• Output Type: CML
• Number Of Inputs: 22
• Number Of Outputs: 1
• Operating Supply Voltage: 1.7 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: TQFN-40 EP
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT

serializer follows the transition of LOCK at GPI. If other
sources also use the GPI input, the FC can implement
a routine to distinguish between interrupts from loss-of-
lock and normal interrupts. The control channel does not
require an active video link and thus can always monitor
LOCK. LOCK asserts for a synchronized video link but
not for the configuration link.
The GPI/GPO provides a simple solution for camera
applications that require a frame sync signal from the
ECU (e.g., surround-view systems). Connect the ECU
frame sync signal to the GPI input and connect the GPO
output to the camera frame sync input. GPI/GPO have a
typical delay of 275Fs. Skew between multiple GPI/GPO
channels is maximum 115Fs. If a lower skew signal is
required, connect the camera’s frame sync input to one
of the serializer’s GPIOs and use an I
command to change the GPIO output state. This has a
maximum skew of 1.5Fs, independent from the used I
bit rate.
The serializer and deserializer have programmable device
addresses. This allows multiple GMSL devices, along with
I
The serializer device address is in register 0x00 of each
device, while the deserializer device address is in register
0x01 of each device. To change a device address, first
write to the device whose address changes (register 0x00
of the serializer for serializer device address change, or
register 0x01 of the deserializer for deserializer device
address change). Then write the same address into the
Table 12. MAx9273 Feature Compatibility
Maxim Integrated
2
HSYNC/VSYNC encoding
Hamming-code error
correction
I
CRC error detection
Double input
Coax
I
C peripherals, to coexist on the same control channel.
2
2
C-to-I
S encoding
MAx9273 FEATURE
2
C
Software Programming of the
Providing a Frame Sync
(Camera Applications)
If feature not supported in deserializer, must be turned off in the serializer.
If feature not supported in deserializer, must be turned off in the serializer.
If feature not supported in deserializer, must use UART-to-I
If feature not supported in deserializer, must be turned off in the serializer.
If feature not supported in deserializer, data is output as a single word at half the input
frequency.
If feature not supported in deserializer, must connect unused serial input through 200nF and
50I in series to AVDD and set the reverse control-channel amplitude to 100mV.
If supported in the deserializer, disable I
Device Addresses
22-Bit GMSL Serializer with Coax or
2
C broadcast write
2
C
corresponding register on the other device (register 0x00
of the deserializer for serializer device address change,
or register 0x01 of the serializer for deserializer device
address change).
CONF1 and CONF0 are three-level inputs that control
the serial interface configuration and power-up defaults.
Connect CONF1or CONF0 through a pullup resistor to
IOVDD to set a high level, a pulldown resistor to GND to
set a low level, or IOVDD/2 or open to set a midlevel. For
digital control, use three-state logic to drive the three-
level logic inputs.
The serializer can block changes to registers. Set
CFGBLOCK to make all registers read only. Once set, the
registers remain blocked until the supplies are removed
or until PWDN is low.
The MAX9273 serializer is designed to pair with the
MAX9272 deserializer, but interoperates with any GMSL
deserializer. See
The serializer has five open-drain GPIOs available when
not used as data or configuration inputs. Setting the GPIO
enable bits (register 0x0E) to 1 enables the GPIOs and
internally connects the respective data or configuration
input low. Setting the GPIO output bits to 0 pulls the output
low, while setting the bits to 1 leaves the output undriven,
and pulled high through internal/external pullup resistors.
The GPIO input buffers are enabled when the GPIO is
enabled. The input states are stored in register 0x10. Set
GPIO_OUT to 1 when using a GPIO_ as an input.
GMSL DESERIALIZER
2
Compatibility with Other GMSL Devices
S in the deserializer.
Three-Level Configuration Inputs
Table 12
STP Cable Drive
2
C or UART-to-UART.
for operating limitations.
Configuration Blocking
MAX9273
GPIOs
38