FT221XS-R FTDI, FT221XS-R Datasheet - Page 11
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FT221XS-R
Manufacturer Part Number
FT221XS-R
Description
USB Interface IC USB to 8 bit SPI / FT1248 IC SSOP-20
Manufacturer
FTDI
Datasheet
1.FT221XS-R.pdf
(47 pages)
Specifications of FT221XS-R
Rohs
yes
Product
USB 2.0
Data Rate
12 Mbps, 480 Mbps
Interface Type
USB
Operating Supply Voltage
2.97 V to 5.5 V
Operating Supply Current
8.1 mA to 13.1 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-20
Tradename
X-Chip
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
FT221XS-R
Manufacturer:
FTDI
Quantity:
780
CBUS Signal
BCD Charger#
Keep_Awake#
BitBang_WR#
BitBang_RD#
BCD Charger
VBUS Sense
Time Stamp
3.3 CBUS Signal Options
The following options can be configured on the CBUS I/O pin. CBUS signal options are common to both
package versions of the FT221X. These options can be configured in the internal MTP memory using the
software utility FT_PPROG, which can be downloaded from the FTDI Utilities (www.ftdichip.com). The
default configuration is described in Section 9.
Table 3.7 CBUS Configuration Control
*When in USB suspend mode the outputs clocks are also suspended.
TRI-STATE
CLK24MHz
CLK12MHz
CLK6MHz
PWREN#
Option
DRIVE 1
DRIVE 0
SLEEP#
GPIO
Copyright © 2013 Future Technology Devices International Limited
Available On CBUS Pin
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
CBUS3
Toggle signal which changes state each time a USB SOF
is received
Prevents the device from entering suspend state when
unplugged. May be used if programming the MTP
memory over the FT1248 interface.
Document No.: FT_000630 Clearance No.: FTDI# 263
can be used to control power to external logic P-Channel
MTP
used as general purpose I/O. Configured in the internal
CBUS bit bang mode option. Allows the CBUS pin to be
USB, then high during USB suspend mode. This output
Goes low during USB suspend mode. Typically used to
Output is low after the device has been configured by
connected to a dedicated battery charger host. Active
logic level MOSFET switch. Enable the interface pull-
Synchronous and asynchronous bit bang mode WR#
Synchronous and asynchronous bit bang mode RD#
Battery charge Detect, indicates when the device is
describes in more detail how to use CBUS bit bang
down option when using the PWREN# in this way.
available from FTDI website (www.ftdichip.com)
memory
Input to detect when VBUS is present.
. A separate application note, AN232R-01,
power down external logic.
Inverse of BCD Charger
24 MHz Clock output.*
12 MHz Clock output.*
6 MHz Clock output.*
Output a constant 1
Output a constant 0
IO Pad is tri-stated
Description
strobe output.
strobe output.
high output.
mode.
Version 1.2
11